Patents by Inventor Daesan Choi

Daesan Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260239737
    Abstract: A method of manufacturing an integrated circuit device, includes forming a de-bonding layer on a carrier substrate, the de-bonding layer including a metallic oxide, forming a light absorbing layer on the de-bonding layer, forming a bonding layer on the light absorbing layer, and bonding an integrated circuit substrate structure to the bonding layer, and irradiating the carrier substrate with light to separate the de-bonding layer from the light absorbing layer. The de-bonding layer has a thermal expansion coefficient that is 10 times or greater than 10 times a thermal expansion coefficient of the light absorbing layer.
    Type: Application
    Filed: February 10, 2026
    Publication date: August 13, 2026
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Taeyeong KIM, Yeonsu LEE, Nungpyo HONG, Daesan CHOI, Bumki MOON, Pil-Kyu KANG
  • Publication number: 20260173799
    Abstract: A semiconductor manufacturing apparatus includes a chamber having an inner space, an optical window dividing the inner space into a processing space and a buffer space, a stage disposed in the processing space and that having a support surface configured to support a substrate, and a light source disposed in the buffer space and configured to irradiate the stage with light through the optical window, and the optical window has communication holes defined therein providing a fluid path between the processing space and the buffer space.
    Type: Application
    Filed: December 18, 2025
    Publication date: June 18, 2026
    Inventors: Daesan Choi, JUNGSHIN LEE, Juno Kim, TAEGYU KANG, JONGHO LEE, JAE-SEON HWANG