Patents by Inventor Dai Ikarashi

Dai Ikarashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11934564
    Abstract: A secret share value [q] of a quotient q of a/p is obtained through secure computation using a secret share value [a] and a modulus p and [a/d0]=[(a+qp)/d0]?[q]p/d0, . . . , [a/dn?1]=[(a+qp)/dn?1]?[q]p/dn?1 are obtained and output through secure computation using secret share values [a] and [q], divisors d0, . . . , dn?1, and a modulus p. Here, [?] is a secret share value of ?, a is a real number, n is an integer equal to or greater than 2, d0, . . . , dn?1 are divisors of real numbers, p is a modulus of a positive integer, and q is a quotient of a positive integer.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: March 19, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventor: Dai Ikarashi
  • Publication number: 20240061904
    Abstract: A secure computation apparatus (1) included in a secure relational algebraic operation system performs secure computation of a composite of a first relational algebraic operation and a second relational algebraic operation on an operation target input table. A ciphertext of an operation target table is input to an input unit (11). A first relational algebraic operation unit (12) performs secure computation of the first relational algebraic operation on the input table. A valid row extraction unit (13) generates an intermediate table obtained by extracting a valid row from an operation result of the first relational algebraic operation. A second relational algebraic operation unit (14) performs secure computation of the second relational algebraic operation on the intermediate table. An output unit (15) outputs an operation result of the second relational algebraic operation.
    Type: Application
    Filed: January 13, 2021
    Publication date: February 22, 2024
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Hiroki SUDO, Dai IKARASHI
  • Patent number: 11907641
    Abstract: A calculation process is efficiently performed to a text file in which one or more records are included, each of the records includes one or more cells having an arbitrary length, and each of the cells includes arbitrary pieces of characters. A parameter setting apparatus sets a maximum value Scsv and a minimum value scsv of a size of character strings for one record by using attribute information as an input, a maximum value Senc of a total size of encode information, a maximum value Sss of a total size of a calculation value obtained by performing specific calculation to the encode information, and a total size Sref of reference information, obtains a function value of C/(Scsv+Senc+Sref) as the number of records which is a process unit of encoding and calculation, and obtains a function value of f0/I·r·Scsv as the number of parallels in the calculation process. Here, C is a cache memory size, M is a main memory size, and f0 is a function value of scsv·M/(scsv+Senc+max(Sref,Sss)).
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: February 20, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventor: Dai Ikarashi
  • Patent number: 11888973
    Abstract: A secure joining system is a secure joining system including a plurality of secure computing apparatuses. The plurality of secure computing apparatuses include a first vector joining unit, a first permutation calculation unit, a first vector generation unit, a second vector joining unit, a first permutation application unit, a second vector generation unit, a first inverse permutation application unit, a first vector extraction unit, a second permutation application unit, a third vector generation unit, a second inverse permutation application unit, a second vector extraction unit, a modified second table generation unit, a third permutation application unit, a fourth vector generation unit, a shifting unit, a third inverse permutation application unit, a bit inversion unit, a third vector extraction unit, a modified first table generation unit, a first table joining unit, and a first table formatting unit.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: January 30, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Dai Ikarashi, Koki Hamada, Ryo Kikuchi, Naoto Kiribuchi
  • Patent number: 11888977
    Abstract: A share generating device obtains N seeds s0, . . . , sN?1, obtains a function value y=g(x, e)?Fm of plaintext x?Fm and a function value e, and obtains information containing a member yi and N?1 seeds sd, where d?{0, . . . , N?1} and d?i, as a share SSi of the plaintext x in secret sharing and outputs the share SSi. It is to be noted that the function value y is expressed by members y0?Fm(0), . . . , yN?1?Fm(N?1) which satisfy m=m(0)+ . . . +m(N?1).
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: January 30, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Dai Ikarashi, Ryo Kikuchi, Koji Chida
  • Patent number: 11886876
    Abstract: A secure strong mapping computing system is a secure joining system including a plurality of secure computing apparatuses. The plurality of secure computing apparatuses include a first vector joining unit 11n, a first permutation calculation unit 12n, a first vector generation unit 13n, a second vector joining unit 14n, a first permutation application unit 15n, a second vector generation unit 16n, a first inverse permutation application unit 17n, and a first vector extraction unit 18n.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: January 30, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Dai Ikarashi, Koki Hamada
  • Patent number: 11880489
    Abstract: Provided is a technique for performing statistical processing such as processing for obtaining parameters of logistic regression analysis faster than before. A secure statistical processing system includes a cross tabulation table computing device 2 that performs secure computation on a cross tabulation table in which frequencies are in plain texts while keeping each record concealed; and a statistical processing device 3 that performs predetermined statistical processing using the cross tabulation table in which frequencies are in plain texts. The cross tabulation table computing device 2 may include a plurality of secure computation devices 221, . . . , 22N that perform secure computation on a cross tabulation table in which frequencies are fragments subjected to secret sharing while keeping each record concealed, and a management device 21 that restores the fragments to compute the cross tabulation table in which frequencies are in plain texts.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: January 23, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Satoshi Tanaka, Asami Miyajima, Gen Takahashi, Dai Ikarashi, Koki Hamada, Ryo Kikuchi, Hitoshi Fuji
  • Patent number: 11868510
    Abstract: To efficiently determine cross tabulation while keeping confidentiality. A flag conversion unit (11) converts a format of a share of a flag that represents a boundary between groups. A boundary number setting unit (12) generates a share of a vector in which the next element number is set when the flag representing a group boundary is true and the number of records is set when the flag is false. A sorting unit (13) generates a share of a sorted vector which has been sorted by a permutation that moves vectors such that the last elements of each group are sequentially arranged from beginning A count calculation unit (14) sets a difference between the value of one element and the value of the preceding element in the sorted vector and generates a share of a vector representing the number of records in each group.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: January 9, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventor: Dai Ikarashi
  • Publication number: 20230401033
    Abstract: A secure MSB normalization system includes n distributed processing apparatuses, each including a bit decomposition unit, a logical sum acquisition unit, a shift amount acquisition unit, and a shift unit, the n bit decomposition units decompose a vector [[{right arrow over (?)}a]]P of a (k, n)-secret shared share into bits and obtain a bit representation vector [[{right arrow over (?)}a]]2{circumflex over (?)}L of the vector [[{right arrow over (?)}a]]P, the n logical sum acquisition units obtain a logical sum [[Ai]]2 of all elements for a vector [[{right arrow over (?)}ai]] at each bit position of the bit representation [[{right arrow over (?)}a]]2{circumflex over (?)}L, the n shift amount acquisition units obtain a share <<?>>p obtained by distributing a shift amount ? for shifting the most significant bit of a logical sum [[A0]]2, . . .
    Type: Application
    Filed: October 16, 2020
    Publication date: December 14, 2023
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventor: Dai IKARASHI
  • Publication number: 20230379151
    Abstract: A secure computation technique for performing a bit shift operation at high speed using a protocol for performing left shift with a numerical value and a shift amount to be shifted as inputs. A secure shift system for computing a share [[s]]P of a numerical value s obtained by shifting a numerical value a by p bits from a share [[a]]P of the numerical value a and a share <<?>>Q of the shift amount p includes a modulus conversion circuitry for computing a share <<?>>p, a first flag computation circuitry for computing shares [[f0]]2, . . . , [[fL]]2, a second flag computation circuitry for computing shares <<f1>>p, . . . , <<fL>>p, a shift amount computation circuitry for computing shares <<??>>p, a left shift circuitry for computing a share [[b]]P, a right shift circuitry for computing shares [[c0]]P, . . . , [[cd-1]]P, a third flag computation circuitry, and a shift value computation circuitry.
    Type: Application
    Filed: October 16, 2020
    Publication date: November 23, 2023
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventor: Dai IKARASHI
  • Publication number: 20230370251
    Abstract: A secure computation apparatus obtains a sequence ??f obtained by rotating elements fp-1, . . . , f0 of a sequence f by ? elements by secure computation using share of random number ? and share of the sequence f without obtaining the random number p and the sequence f, obtains the value b??{0, . . . , p?1} representing the position of the element cfb? whose value is ? among the elements cfp-1, . . . , cf0 in the sequence ??f, and obtains the share of the value b by secure computation using the share of the random number ? and the value b?. Here, p is an integer of 2 or more, f is a sequence of p elements fp-1, . . . , f0, a value of one element fb among the elements fp-1, . . . , f0 is ?, a value of an element other than the element fb is other than ?, and ? is a random integer.
    Type: Application
    Filed: October 16, 2020
    Publication date: November 16, 2023
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventor: Dai IKARASHI
  • Publication number: 20230367879
    Abstract: A set SP(i) of k secure computation apparatuses selected from a set PA of n secure computation apparatuses repeats processing of multiplying a share according to a secret sharing scheme, by power-of-2 number 2?(SP(i)) with the share ?(SP(i)) as an exponent, the the share ?(SP(i)) being obtained by secret sharing of p according to a replicative secret sharing scheme, and redistribution the value obtained in the processing is redistributed into the set SP(i+1) of k secure computation apparatuses selected from the set PA of n secure computation apparatuses. However, the final time is not re-dispersed. Thus, a share of a multiplicative rotation result is obtained. However, the final time is not re-dispersed. Thus, a share of a multiplicative rotation result is obtained.
    Type: Application
    Filed: October 16, 2020
    Publication date: November 16, 2023
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventor: Dai IKARASHI
  • Publication number: 20230367846
    Abstract: A parameter estimation device for executing a parameter estimation of a cox proportional hazard model by secure computation comprises: a data storage unit that stores a database having, with respect to each object to be observed, a record including a point of time at which an event was observed, a feature amount of an object to be observed at the point of time, and a state of the object to be observed at the point of time; a calculation unit that, by reading a vector comprising points of time from the database, and sorting the vector, generates a replacement table and a flag indicating a boundary between the points of time, by using the replacement table and the flag, totalizer the feature amounts at the respective points of time while concealing values at the points of time, and performs the parameter estimation on the basis of a result of the totalization; and an output unit that outputs a parameter estimated by the calculation unit.
    Type: Application
    Filed: October 16, 2020
    Publication date: November 16, 2023
    Inventors: Ibuki MISHINA, Koki HAMADA, Dai IKARASHI, Ryo KIKUCHI
  • Patent number: 11818254
    Abstract: A share [x]i of plaintext x in accordance with Shamir's secret sharing scheme is expressed by N shares [x0]i, . . . , [xN?1]i, and each share generating device Ai obtains a function value ri=Pm(i(?))(si) of a seed si, obtains a first calculated value ?i=?(i, i(?))[xi(?)]i+ri using a Lagrange coefficient ?(i, i(?)), a share [xi(?)]i, and the function value ri, and outputs the first calculated value ?i to a share generating device Ai(?). Each share generating device Ai accepts a second calculated value ?i(+), obtains a third calculated value zi=?(i, i(+))[xi]i+?i(+) using a Lagrange coefficient ?(i, i(+)), a share [xi]i, and the second calculated value ?i(+), and obtains information containing the seed si and the third calculated value zi as a share SSi of the plaintext x in secret sharing and outputs the share SSi.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: November 14, 2023
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Dai Ikarashi, Ryo Kikuchi, Koji Chida
  • Publication number: 20230359438
    Abstract: Provided is a secure computation technique for efficiently uniforming exponent parts of floating points. A secret exponent part uniforming system which, from a share ([[?a]]P, [[??]]Q) of a floating point vector (?a= (a0,..., am-1), ??=(?0, ..., ?m-1)), calculates a share ([[~b]]P, [[??max]]Q) of a floating point vector with uniformed exponent parts (?b= (b0,..., bm-1), ??max=(?max, ..., ?max) (?max=max{?0, ..., ?m-1}), 2?_iai?2?_maxbi is satisfied), comprises a mantissa part calculation means for calculating a share [[?b]]P by calculating a share [[bi]]P (bi=2-?_dif,iai) of the number bi from the i-th element of the share [[?a]]P and the i-th element of a share <<??dif>>Q converted by replicated secret sharing from a share [[??dif]]Q=[[??]]Q-[[??max]]Q.
    Type: Application
    Filed: October 16, 2020
    Publication date: November 9, 2023
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventor: Dai IKARASHI
  • Publication number: 20230359439
    Abstract: (k,n)-secret-sharing share [[a]]p is converted into (k,k)-additive-secret-sharing share <a>p, each bit of a?0 is (k,n)-secret-sharing to obtain a share [[a?0]]2{circumflex over (?)}|p|; each bit of the share <a>p1 is (k,n)-secret-shared to obtain a share [[a]]2{circumflex over (?)}|p|; a bit representation share [[a?0+a1]]2{circumflex over (?)}(|p|+1) of a?0+a1 is obtained; it is assumed that the most significant bit of the share [[a?0+a1]]2{circumflex over (?)}(|p|+1) is a share [[q]]2, a share [[q]]Q is obtained from the share [[q]]2; <a>p0 mod Q, <a>p1 mod Q are obtained from <a?>p0, <a>p1 and are set as a share <a?>Q; the share <a?>Q is converted in (k,n)-secret-sharing to obtain (k,n)-secret-sharing share [[a?]]Q; [[a]]Q is calculated from the share [[a]]Q and the share [[q]]Q.
    Type: Application
    Filed: October 16, 2020
    Publication date: November 9, 2023
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventor: Dai IKARASHI
  • Publication number: 20230344630
    Abstract: Normalization is performed with high precision in secure computation. A secure inverse computation system (100) receives [a] as an input and calculates [1/a]. The bit decomposition unit (11) generates a bit representation a0, . . . , a??1 of a. The flag sequence generation unit (12) generates {x0}, . . . , {x??1} indicating a most significant bit of {a0}, . . . , {a??1}. A bit sequence generation unit (13) generates {y0}, . . . , {y??1} in which {y0}, {y1}: ={0}, {yi}: ={(¬ai?2?xi?1) XOR xi} (2?i<?), {y?}: ={¬a??2?x??1}. The normalization multiplier generation unit (14) generates [c] obtained by bit-connecting {y??1}, . . . , {y0}. The normalization unit (15) calculates [b]: =[a][c].
    Type: Application
    Filed: January 20, 2020
    Publication date: October 26, 2023
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventor: Dai IKARASHI
  • Patent number: 11797540
    Abstract: A secure joining system is a secure joining system comprising a plurality of secure computation apparatuses; and the plurality of secure computation apparatuses are provided with vector joining parts 11n, first permutation calculating parts 12n, first permutation applying parts 13n, first vector generating parts 14n, second vector generating parts 15n, bit-flipping parts 16n, second permutation calculating parts 17n, second permutation applying parts 18n, third vector generating parts 19n, inverse permutation applying parts 110n, vector separating parts 111n, third permutation applying parts 112n, attribute value permutating parts 113n and fourth vector generating parts 114n.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: October 24, 2023
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Dai Ikarashi, Koki Hamada
  • Patent number: 11675847
    Abstract: An equality determination unit obtains [ei] in which ei=(ei,1, . . . , ei,N) is concealed, ei in which ei,j=a1 is established when xi,j is kj and ei,j=a0 is established when xi,j is not kj, by secure computation using a concealed search target word [xi] and a concealed search word [k]. A wildcard determination unit obtains [w] in which w=(w1, . . . , wN) is concealed, w in which wj=b1 is established when kj is a wildcard character and wj=b0 is established when kj is not a wildcard character, by secure computation using [k]. An OR operation unit obtains [yi] in which yi=(yi,1, . . . , yi,N) is concealed, yi in which yi,j=d1 is established when at least one of ei,j=a1 and wj=b1 is satisfied and yi,j=d0 is established when at least one of ei,j=a1 and wj=b1 is not satisfied, by secure computation using [ei] and [w].
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: June 13, 2023
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventor: Dai Ikarashi
  • Patent number: 11646880
    Abstract: A power is computed at high speed with a small number of communication rounds. A secret computation system that includes three or more secret computation apparatuses computes a share [a?] of the ?-th power of data “a” from a share [a] of data “a” while data “a” is concealed. The share [a] of data “a” and an exponent ? are input to an input unit (step S11). A local operation unit computes the pu-th power of a share [at] of the t-th power of data “a” without communication with the other secret computation apparatuses (step S12). A secret computation unit uses secret computation that requires communication with the other secret computation apparatuses to compute a multiplication in which at least one of the multiplicands is [ a ( t * p ^ u ) ] , the computation result of the local operation unit, to obtain the share [a?] (step S13). An output unit outputs the share [a?] (step S14).
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: May 9, 2023
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Dai Ikarashi, Ryo Kikuchi