Patents by Inventor Dai Karasawa

Dai Karasawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6621723
    Abstract: A power converter including a plurality of arms. Each of the arms is composed of series connected first and second switching devices, first and second freewheeling diodes respectively connected in antiparallel with the first and second switching devices, and a phase capacitor connected in parallel with a series circuit of the first and second switching devices. The power converter further includes a DC power source connected between a DC positive bus and a DC negative bus, and a filter capacitor connected between the DC positive bus and the DC negative bus and in parallel with the DC power source. Each of the arms of the power converter is connected individually to the filter capacitor between the DC positive bus and the DC negative bus.
    Type: Grant
    Filed: March 11, 1999
    Date of Patent: September 16, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Dai Karasawa, Katsumi Fukasawa
  • Patent number: 6134126
    Abstract: A power conversion system always keeps a constant voltage level relative to the ground potential and shows an improved controllability for the noise compensation current. In the noise reduction circuit of the system, a rectified DC voltage is applied to the positive side output line and the negative side output line. The DC voltage is divided by a pair of capacitors connected in series with the intermediary point held to the ground potential. Thus, the positive side output line can always supply a positive voltage that is held to a constant level relative to the ground potential. Similarly, the negative side output line can always supply a negative voltage that is held to a constant level relative to the ground potential. Additionally, as the transistors are controlled for on/off operations by the amplifier, the noise compensation current flows through the noise reduction circuit between the input grounding terminal of the full-wave rectifier and the ground.
    Type: Grant
    Filed: September 7, 1999
    Date of Patent: October 17, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroo Ikekame, Katsumi Fukasawa, Dai Karasawa
  • Patent number: 5376815
    Abstract: A semiconductor device having a bipolar MOS composite element pellet suitable for a compression structure. In this pellet, a semiconductor substrate on which a MOS composite element is formed is electrically connected to an external part by an electrode plate compressed to the substrate.
    Type: Grant
    Filed: September 21, 1993
    Date of Patent: December 27, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshio Yokota, Mitsuhiko Kitagawa, Dai Karasawa