Patents by Inventor Daichi MASUKO

Daichi MASUKO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11170983
    Abstract: The present embodiment relates to an electron multiplier having a structure configured to suppress and stabilize a variation of a resistance value in a wider temperature range. The electron multiplier includes a resistance layer sandwiched between a substrate and a secondary electron emitting layer and configured using a Pt layer two-dimensionally formed on a layer formation surface which is coincident with or substantially parallel to a channel formation surface of the substrate. The resistance layer has a temperature characteristic within a range in which a resistance value at ?60° C. is 10 times or less, and a resistance value at +60° C. is 0.25 times or more, relative to a resistance value at a temperature of 20° C.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: November 9, 2021
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Daichi Masuko, Hajime Nishimura, Yasumasa Hamana, Hiroyuki Watanabe
  • Patent number: 11011358
    Abstract: The present embodiment relates to an electron multiplier having a structure configured to suppress and stabilize a variation of a resistance value in a wider temperature range. In the electron multiplier, a resistance layer sandwiched between a substrate and a secondary electron emitting layer formed of an insulating material includes a metal layer in which a plurality of metal particles formed of a metal material whose resistance value has a positive temperature characteristic are two-dimensionally arranged on a layer formation surface, which is coincident with or substantially parallel to a channel formation surface of the substrate, in the state of being adjacent to each other with a part of the first insulating material interposed therebetween, the metal layer having a thickness set to 5 to 40 angstroms.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: May 18, 2021
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Daichi Masuko, Hajime Nishimura, Yasumasa Hamana, Hiroyuki Watanabe
  • Publication number: 20210134572
    Abstract: The present embodiment relates to an electron multiplier having a structure configured to suppress and stabilize a variation of a resistance value in a wider temperature range. The electron multiplier includes a resistance layer sandwiched between a substrate and a secondary electron emitting layer and configured using a Pt layer two-dimensionally formed on a layer formation surface which is coincident with or substantially parallel to a channel formation surface of the substrate. The resistance layer has a temperature characteristic within a range in which a resistance value at ?60° C. is 10 times or less, and a resistance value at +60° C. is 0.25 times or more, relative to a resistance value at a temperature of 20° C.
    Type: Application
    Filed: April 10, 2018
    Publication date: May 6, 2021
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Daichi MASUKO, Hajime NISHIMURA, Yasumasa HAMANA, Hiroyuki WATANABE
  • Publication number: 20210118655
    Abstract: The present embodiment relates to an electron multiplier having a structure configured to suppress and stabilize a variation of a resistance value in a wider temperature range. In the electron multiplier, a resistance layer sandwiched between a substrate and a secondary electron emitting layer comprised of an insulating material includes a metal layer in which a plurality of metal particles comprised of a metal material whose resistance value has a positive temperature characteristic are two-dimensionally arranged on a layer formation surface, which is coincident with or substantially parallel to a channel formation surface of the substrate, in the state of being adjacent to each other with a part of the first insulating material interposed therebetween, the metal layer having a thickness set to 5 to 40 angstroms.
    Type: Application
    Filed: April 10, 2018
    Publication date: April 22, 2021
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Daichi MASUKO, Hajime NISHIMURA, Yasumasa HAMANA, Hiroyuki WATANABE
  • Patent number: 10818484
    Abstract: A microchannel plate is provided with a substrate including a front surface, a rear surface, and a side surface, a plurality of channels penetrating from the front surface to the rear surface of the substrate, a first film provided on at least an inner wall surface of the channel, a second film provided on at least a part of the first film, and electrode layers provided on the front surface and the rear surface of the substrate. The first film is made of MgO, the second film is made of SiO2, and the second film is thinner than the first film.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: October 27, 2020
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Takaaki Nagata, Yasumasa Hamana, Hajime Nishimura, Daichi Masuko
  • Patent number: 10727035
    Abstract: The present embodiment relates to an electron multiplier having a structure configured to suppress and stabilize a variation of a resistance value in a wider temperature range. In the electron multiplier, a resistance layer sandwiched between a substrate and a secondary electron emitting layer comprised of an insulating material is configured using a single metal layer in which a plurality of metal particles comprised of a metal material whose resistance value has a positive temperature characteristic are two-dimensionally arranged on a layer formation surface, which is coincident with or substantially parallel to a channel formation surface of the substrate, in the state of being adjacent to each other with a part of the first insulating material interposed therebetween.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: July 28, 2020
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Daichi Masuko, Yasumasa Hamana, Hajime Nishimura, Hiroyuki Watanabe
  • Publication number: 20200176236
    Abstract: The present embodiment relates to an electron multiplier having a structure configured to suppress and stabilize a variation of a resistance value in a wider temperature range. In the electron multiplier, a resistance layer sandwiched between a substrate and a secondary electron emitting layer comprised of an insulating material is configured using a single metal layer in which a plurality of metal particles comprised of a metal material whose resistance value has a positive temperature characteristic are two-dimensionally arranged on a layer formation surface, which is coincident with or substantially parallel to a channel formation surface of the substrate, in the state of being adjacent to each other with a part of the first insulating material interposed therebetween.
    Type: Application
    Filed: April 10, 2018
    Publication date: June 4, 2020
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Daichi MASUKO, Yasumasa HAMANA, Hajime NISHIMURA, Hiroyuki WATANABE
  • Publication number: 20200027709
    Abstract: A microchannel plate is provided with a substrate including a front surface, a rear surface, and a side surface, a plurality of channels penetrating from the front surface to the rear surface of the substrate, a first film provided on at least an inner wall surface of the channel, a second film provided on at least a part of the first film, and electrode layers provided on the front surface and the rear surface of the substrate. The first film is made of MgO, the second film is made of SiO2, and the second film is thinner than the first film.
    Type: Application
    Filed: January 23, 2018
    Publication date: January 23, 2020
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Takaaki NAGATA, Yasumasa HAMANA, Hajime NISHIMURA, Daichi MASUKO