Patents by Inventor Daigo Chabata

Daigo Chabata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090211797
    Abstract: A semiconductor package includes an IC chip having a rectangular (or square) semiconductor substrate, and an integrated circuit formed on a main surface of the semiconductor substrate. The semiconductor package also includes a support substrate on which the IC chip is mounted. A power source line is disposed on the main surface of the semiconductor substrate along the edge of the semiconductor substrate in the shape of a rectangle to supply a power source voltage to the integrated circuit. A main relay pad is provided on the semiconductor substrate and connected to one corner of the power source line. A secondary relay pad is provided on the semiconductor substrate and connected to another corner of the power source line. The semiconductor package also includes a support part to support the IC chip, an external power source supply terminal, and a relay line to connect both the main relay pad and the secondary relay pad to the external power source supply terminal.
    Type: Application
    Filed: January 23, 2009
    Publication date: August 27, 2009
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventor: Daigo CHABATA
  • Patent number: 7492038
    Abstract: A semiconductor device according to the present invention comprises, on a first semiconductor chip, a first circuit element region in which a first electrode group is arranged along an outer periphery of the first semiconductor chip in such a manner as to surround a second semiconductor chip, a second electrode group is arranged along the outer periphery of the first semiconductor chip in such a manner as to surround the first electrode group, and the first semiconductor chip is surrounded by the first electrode group, and a second circuit element region which surrounds the first electrode group and is surrounded by the second electrode group.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: February 17, 2009
    Assignee: Oki Semiconductor Co., Ltd.
    Inventors: Yoshihiro Saeki, Shinji Hiratsuka, Daigo Chabata
  • Publication number: 20050127526
    Abstract: A semiconductor device according to the present invention comprises, on a first semiconductor chip, a first circuit element region in which a first electrode group is arranged along an outer periphery of the first semiconductor chip in such a manner as to surround a second semiconductor chip, a second electrode group is arranged along the outer periphery of the first semiconductor chip in such a manner as to surround the first electrode group, and the first semiconductor chip is surrounded by the first electrode group, and a second circuit element region which surrounds the first electrode group and is surrounded by the second electrode group.
    Type: Application
    Filed: January 21, 2004
    Publication date: June 16, 2005
    Applicant: Oki Electric Industry Co., Ltd.
    Inventors: Yoshihiro Saeki, Shinji Hiratsuka, Daigo Chabata