Patents by Inventor Daijiro Ishibashi
Daijiro Ishibashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210013178Abstract: An electronic module includes: a plurality of heat generating members provided over a first surface of a board; a frame joined to the first surface of the board and provided between the plurality of heat generating members that are arranged; and a lid configured to cover the first surface of the board and thermally coupled to each of the plurality of heat generating members, the frame being a grid-shaped frame or a mesh-shaped frame.Type: ApplicationFiled: July 8, 2020Publication date: January 14, 2021Applicant: FUJITSU LIMITEDInventors: TERU NAKANISHI, Daijiro Ishibashi, Shinya Sasaki, Yukiko Oshikubo, Yoshihiro NAKATA
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Patent number: 10861805Abstract: A high frequency module includes: a package section including a semiconductor chip, a first portion of a backshort being integrated with the semiconductor chip by a first resin, and a first rewiring line electrically coupled to the semiconductor chip and including a portion to be an antenna coupler; and a waveguide with which a second portion of the backshort is integrated, wherein the package section and the waveguide are integrated by a second resin, to position the portion to be the antenna coupler between the waveguide and the backshort.Type: GrantFiled: June 20, 2019Date of Patent: December 8, 2020Assignee: FUJITSU LIMITEDInventor: Daijiro Ishibashi
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Patent number: 10483195Abstract: A resin board includes: a resin layer and a through electrode buried in the resin layer, wherein the through electrode has an electrode surface exposed from a front surface or a back surface of the resin layer and a lateral surface, and the electrode surface and the lateral surface form an obtuse angle.Type: GrantFiled: June 12, 2017Date of Patent: November 19, 2019Assignee: FUJITSU LIMITEDInventors: Yasushi Kobayashi, Yoshihiro Nakata, Yoshikatsu Ishizuki, Daijiro Ishibashi, Shinya Sasaki
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Publication number: 20190311998Abstract: A high frequency module includes: a package section including a semiconductor chip, a first portion of a backshort being integrated with the semiconductor chip by a first resin, and a first rewiring line electrically coupled to the semiconductor chip and including a portion to be an antenna coupler; and a waveguide with which a second portion of the backshort is integrated, wherein the package section and the waveguide are integrated by a second resin, to position the portion to be the antenna coupler between the waveguide and the backshort.Type: ApplicationFiled: June 20, 2019Publication date: October 10, 2019Applicant: FUJITSU LIMITEDInventor: Daijiro Ishibashi
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Patent number: 10389006Abstract: An electronic apparatus has a substrate having a signal terminal and a waveguide formed above the substrate. The waveguide includes a lower conductor having an opening at a position corresponding to the signal terminal of the substrate and an upper conductor arranged above the lower conductor. A conductor pin is formed on the signal terminal, the conductor pin penetrating the opening without contacting the lower conductor of the waveguide. The conductor pin is connected to the upper conductor above the lower conductor.Type: GrantFiled: January 18, 2017Date of Patent: August 20, 2019Assignee: FUJITSU LIMITEDInventor: Daijiro Ishibashi
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Patent number: 10283464Abstract: An electronic device includes a semiconductor device including a semiconductor chip, a first grounded layer formed on a surface of the semiconductor chip, a mold resin arranged on a side of the semiconductor device, an insulating layer arranged over the semiconductor device and the mold resin, a second grounded layer formed between the semiconductor device and the insulating layer, and the resin mold and the insulating layer, a second wiring layer formed over the insulating layer and includes a first area disposed at a part overlapping with the second grounded layer and a second area disposed on a side of an end part of the second grounded layer, a via that couples the first wiring layer and the second area of the second wiring layer, and a grounded conductor formed inside the insulating layer at a position overlapping with the second area of the second wiring layer.Type: GrantFiled: June 26, 2018Date of Patent: May 7, 2019Assignee: FUJITSU LIMITEDInventor: Daijiro Ishibashi
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Patent number: 10199335Abstract: An electronic device includes a first electronic component including a first signal line and a first ground conductor surface, a second electronic component that is placed above the first electronic component and includes a second signal line and a second ground conductor surface opposed to the first ground conductor surface, a waveguide including the first ground conductor surface, the second ground conductor surface, and a pair of first ground conductor walls that are opposed to each other and are placed between the first ground conductor surface and the second ground conductor surface, a first transducing part that transduces a signal between the first signal line and the waveguide, and a second transducing part that transduces a signal between the second signal line and the waveguide.Type: GrantFiled: March 3, 2017Date of Patent: February 5, 2019Assignee: FUJITSU LIMITEDInventor: Daijiro Ishibashi
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Publication number: 20190019767Abstract: An electronic device includes a semiconductor device including a semiconductor chip, a first grounded layer formed on a surface of the semiconductor chip, a mold resin arranged on a side of the semiconductor device, an insulating layer arranged over the semiconductor device and the mold resin, a second grounded layer formed between the semiconductor device and the insulating layer, and the resin mold and the insulating layer, a second wiring layer formed over the insulating layer and includes a first area disposed at a part overlapping with the second grounded layer and a second area disposed on a side of an end part of the second grounded layer, a via that couples the first wiring layer and the second area of the second wiring layer, and a grounded conductor formed inside the insulating layer at a position overlapping with the second area of the second wiring layer.Type: ApplicationFiled: June 26, 2018Publication date: January 17, 2019Applicant: FUJITSU LIMITEDInventor: Daijiro Ishibashi
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Patent number: 9953937Abstract: An electronic device includes a structure including a first resin layer, an electronic component buried in the first resin layer, a reflector element for antenna disposed on the first resin layer, and an insulating layer disposed on the reflector element; a semiconductor device; a second resin layer in which the structure and the semiconductor device are buried; and a radiating element of the antenna, the radiating element being disposed on the insulating layer and electrically coupled the semiconductor device.Type: GrantFiled: April 13, 2016Date of Patent: April 24, 2018Assignee: FUJITSU LIMITEDInventor: Daijiro Ishibashi
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Publication number: 20170365545Abstract: A resin board includes: a resin layer and a through electrode buried in the resin layer, wherein the through electrode has an electrode surface exposed from a front surface or a back surface of the resin layer and a lateral surface, and the electrode surface and the lateral surface form an obtuse angle.Type: ApplicationFiled: June 12, 2017Publication date: December 21, 2017Applicant: FUJITSU LIMITEDInventors: Yasushi Kobayashi, Yoshihiro NAKATA, Yoshikatsu Ishizuki, Daijiro Ishibashi, Shinya Sasaki
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Publication number: 20170263578Abstract: An electronic device includes a first electronic component including a first signal line and a first ground conductor surface, a second electronic component that is placed above the first electronic component and includes a second signal line and a second ground conductor surface opposed to the first ground conductor surface, a waveguide including the first ground conductor surface, the second ground conductor surface, and a pair of first ground conductor walls that are opposed to each other and are placed between the first ground conductor surface and the second ground conductor surface, a first transducing part that transduces a signal between the first signal line and the waveguide, and a second transducing part that transduces a signal between the second signal line and the waveguide.Type: ApplicationFiled: March 3, 2017Publication date: September 14, 2017Applicant: FUJITSU LIMITEDInventor: Daijiro Ishibashi
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Publication number: 20170125871Abstract: An electronic apparatus has a substrate having a signal terminal and a waveguide formed above the substrate. The waveguide includes a lower conductor having an opening at a position corresponding to the signal terminal of the substrate and an upper conductor arranged above the lower conductor. A conductor pin is formed on the signal terminal, the conductor pin penetrating the opening without contacting the lower conductor of the waveguide. The conductor pin is connected to the upper conductor above the lower conductor.Type: ApplicationFiled: January 18, 2017Publication date: May 4, 2017Applicant: FUJITSU LIMITEDInventor: Daijiro Ishibashi
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Publication number: 20160351729Abstract: An electronic device includes a structure including a first resin layer, an electronic component buried in the first resin layer, a reflector element for antenna disposed on the first resin layer, and an insulating layer disposed on the reflector element;a semiconductor device;a second resin layer in which the structure and the semiconductor device are buried; and a radiating element of the antenna, the radiating element being disposed on the insulating layer and electrically coupled the semiconductor device.Type: ApplicationFiled: April 13, 2016Publication date: December 1, 2016Applicant: FUJITSU LIMITEDInventor: Daijiro Ishibashi
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Patent number: 9509058Abstract: A high-frequency module includes an integrated body including a semiconductor chip and a reflector, the semiconductor and the reflector being integrated by a resin; an antenna provided with a space from the reflector; and a rewiring layer provided on the surface of the integrated body, the rewiring layer including a rewiring line electrically coupling the semiconductor chip to the antenna. Further, a method for manufacturing a high-frequency module, the method includes forming an integrated body by integrating a semiconductor chip with a reflector by a resin; and forming a rewiring layer on the surface of the integrated body, the rewiring layer including a rewiring line electrically coupling the semiconductor chip to an antenna provided with a space from the reflector.Type: GrantFiled: June 16, 2015Date of Patent: November 29, 2016Assignee: FUJITSU LIMITEDInventors: Hiroshi Matsumura, Daijiro Ishibashi, Toshihide Suzuki, Yoichi Kawano
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Publication number: 20160006131Abstract: A high-frequency module includes an integrated body including a semiconductor chip and a reflector, the semiconductor and the reflector being integrated by a resin; an antenna provided with a space from the reflector; and a rewiring layer provided on the surface of the integrated body, the rewiring layer including a rewiring line electrically coupling the semiconductor chip to the antenna. Further, a method for manufacturing a high-frequency module, the method includes forming an integrated body by integrating a semiconductor chip with a reflector by a resin; and forming a rewiring layer on the surface of the integrated body, the rewiring layer including a rewiring line electrically coupling the semiconductor chip to an antenna provided with a space from the reflector.Type: ApplicationFiled: June 16, 2015Publication date: January 7, 2016Inventors: Hiroshi Matsumura, Daijiro Ishibashi, Toshihide Suzuki, Yoichi Kawano