Patents by Inventor Daiki Masumoto

Daiki Masumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5369731
    Abstract: An asynchronous control system for a neuro computer, includes an inter-connected type neural network composed of a plurality of neurons for multiplying a plurality of input signals with corresponding weights, calculating a total sum-of-products of the input signals and weight, thereby providing the sum-of product signals, and converting the sum-of-product signal using a non-linear function. A weight memory is provided for storing data of the weights for said neurons, and a controller is provided for generating a control pattern which controls the neural network. A selector randomly selects one of the neurons which performs signal processing during one processing cycle.
    Type: Grant
    Filed: September 10, 1991
    Date of Patent: November 29, 1994
    Assignee: Fujitsu Limited
    Inventors: Daiki Masumoto, Hideki Kato, Hideki Yoshizawa, Hiroki Iciki
  • Patent number: 5220660
    Abstract: A parallel data processing apparatus including a plurality of processors, a pair of signal paths are provided for each processor, one signal path of each pair being used for supplying a predetermined signal to the processor, and the second signal path being used for returning the signal from the processor to a predetermined position common to all of the processors. Each of the above signal paths include a variable delay unit. The apparatus further includes a delay measuring unit for measuring the time elapsing while the signal is propagated from the above predetermined position to a corresponding processor and then returned from the processor to the above predetermined position through each pair of signal paths. Further the apparatus includes a delay adjusting unit for adjusting the delays caused by the variable delay units in all of the signal paths.
    Type: Grant
    Filed: June 27, 1991
    Date of Patent: June 15, 1993
    Assignee: Fujitsu Limited
    Inventors: Hideki Yoshizawa, Hideki Kato, Hiroki Iciki, Daiki Masumoto