Abstract: According to one embodiment, a memory system includes an intermediate value memory that holds decoded words of first and second component codes and reliability information and calculates a soft-input value of the first component code based on at least a decoded word concerning the second component code and reliability information and read information, decodes the soft-input value of the first component code, thereby calculating a decoded word of the first component code and reliability information, updates the intermediate value memory with the calculated decoded word and reliability information, calculates a soft-input value of the second component code based on at least the decoded word of the first component code and the reliability information and read information, decodes the soft-input value of the second component code, thereby calculating a decoded word of the second component code and reliability information, and updates the intermediate value memory with the calculated decoded word and reliability i

Abstract: A memory controller according to an embodiment includes a memory interface that reads out a received word from a non-volatile memory and a decoder that performs bounded distance decoding for the read received word. The decoder sets rm (rm is a natural number equal to or larger than 1) symbols of a plurality of symbols constituting the received word, as options of symbol positions at each of which an error is assumed, generates a test pattern in which m (m is a natural number equal to or larger than 1 and equal to or smaller than the rm) symbols of the rm symbols are objects of rewriting, generates test hard-decision values by rewriting each of hard-decision values of the m symbols that are objects of rewriting in the test pattern, among the symbols, and performs bounded distance decoding for the test hard-decision values.

Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a memory controller. The memory controller calculates a reliability metric on the basis of at least a soft-decision input value calculated on the basis of read information that is read from the nonvolatile memory, and a decoded word, stores reference information that is a history of a plurality of reliability metrics or statistical information obtained from the history, calculates reliability from the reliability metric by using correspondence information, calculates decoding information on the basis of the decoded word and the reliability, and updates the correspondence information on the basis of the reference information.

Abstract: According to one embodiment, a memory system includes a non-volatile memory, a memory interface that reads data recorded in the non-volatile memory as a received value, a converting unit that converts the received value to first likelihood information by using a first conversion table, a decoder that decodes the first likelihood information, a control unit that outputs an estimated value with respect to the received value, which is a decoding result obtained by the decoding, when decoding by the decoder has succeeded, and a generating unit that generates a second conversion table based on a decoding result obtained by the decoding, when decoding of the first likelihood information by the decoder has failed. When the generating unit generates the second conversion table, the converting unit converts the received value to the second likelihood information by using the second conversion table, and the decoder decodes the second likelihood information.

Abstract: A developing device includes a hardware processor that performs control not to cause an image to be formed on an image bearing member by a first developer bearing member and to cause a first image to be formed on the image beating member by a second developer bearing member, in which the hardware processor corrects developing conditions of the plural developer bearing members based on a developability detection result of the first image formed by the second developer bearing member.

Abstract: According to an embodiment, a memory system includes: a test pattern decoding unit that detects an intermediate decoding word from a plurality of test patterns; a Euclid distance calculating unit that calculates a Euclid distance between the intermediate decoding word and a received word; and a maximum likelihood decoding word selecting unit that maintains a maximum likelihood decoding word candidate. In a case where a Euclid distance of the intermediate decoding word is shorter than a Euclid distance of the maximum likelihood decoding word candidate, the maximum likelihood decoding word selecting unit updates the maximum likelihood decoding word candidate by using the intermediate decoding word and the test pattern decoding unit does not execute decoding of a test pattern having no possibility that the Euclid distance of the intermediate decoding word becomes shorter than the Euclid distance of the maximum likelihood decoding word candidate.

Abstract: An i-type layer is formed on a side of one surface of a crystalline semiconductor substrate. An n-type layer or a p-type layer is formed on the i-type layer and includes a conductive impurity. A TCO is formed on the n-type layer or the p-type layer. A density in a proximate portion of the n-type layer or the p-type layer closer to the TCO than a remote portion of the n-type layer or the p-type layer is smaller than a density in the remote portion.

Abstract: According to one embodiment, a memory system includes a first decoder that decodes read information read from a nonvolatile memory that records therein a multidimensional error-correcting code to output hard decision decoding information of each symbol; a second decoder that performs soft decision decoding in units of component codes for the read information using a soft-input value to output soft decision decoding information of each symbol; a soft-decision-decoding information memory that retains the soft decision decoding information of each symbol; and a soft-input-value specifying unit that obtains the soft-input value of each symbol using the read information and the hard decision decoding information or the soft decision decoding information, and the soft-input-value specifying unit obtains an initial value of the soft-input value using the read information and the hard decision decoding information, and outputs an output decode word obtained as a result of the soft decision decoding when the output de

Abstract: A developing device includes a hardware processor that performs control not to cause an image to be formed on an image bearing member by a first developer bearing member and to cause a first image to be formed on the image beating member by a second developer bearing member, in which the hardware processor corrects developing conditions of the plural developer bearing members based on a developability detection result of the first image formed by the second developer bearing member.

Abstract: An image forming apparatus includes a plurality of image formers each capable of forming, on a sheet, an overlap image and a non-overlap image, a fixer that fixes, on the sheet, a whole image composed of the overlap images and the non-overlap images, and a hardware processor that controls each of the plurality of image formers such that a difference in image at a boundary between the overlap image and the non-overlap image is reduced in the whole image.

Abstract: According to one embodiment, a memory system includes a non-volatile memory, a memory interface that reads data recorded in the non-volatile memory as a received value, a converting unit that converts the received value read from the non-volatile memory to first likelihood information by using a first conversion table, a decoder that decodes the first likelihood information, a control unit that outputs an estimated value with respect to the received value, which is a decoding result obtained by the decoding, when decoding by the decoder has succeeded, and a generating unit that generates a second conversion table based on a decoding result obtained by the decoding, when decoding of the first likelihood information by the decoder has failed. When the generating unit generates the second conversion table, the converting unit converts the received value to the second likelihood information by using the second conversion table, and the decoder decodes the second likelihood information.

Abstract: According to one embodiment, a decoding device that decodes a multi-dimensional error correction code having two or more component codes includes a storage unit that stores therein the multi-dimensional error correction code, an additional-information storage unit that manages each syndrome of the at least two component codes or a reliability flag indicating whether the syndrome has a value of 0 or other than 0, a decoder that performs a first decoding process in a unit of component code with respect to the multi-dimensional error correction code stored in the storage unit to detect an error vector of each component code, and a detection unit that determines whether detection of the error vector by the decoder is false detection, based on the syndrome or the reliability flag stored in the additional-information storage unit.

Abstract: According to one embodiment, a memory system includes an intermediate value memory that holds decoded words of first and second component codes and reliability information and calculates a soft-input value of the first component code based on at least a decoded word concerning the second component code and reliability information and read information, decodes the soft-input value of the first component code, thereby calculating a decoded word of the first component code and reliability information, updates the intermediate value memory with the calculated decoded word and reliability information, calculates a soft-input value of the second component code based on at least the decoded word of the first component code and the reliability information and read information, decodes the soft-input value of the second component code, thereby calculating a decoded word of the second component code and reliability information, and updates the intermediate value memory with the calculated decoded word and reliability i

Abstract: According to an embodiment, a memory system includes: a test pattern decoding unit that detects an intermediate decoding word from a plurality of test patterns; a Euclid distance calculating unit that calculates a Euclid distance between the intermediate decoding word and a received word; and a maximum likelihood decoding word selecting unit that maintains a maximum likelihood decoding word candidate. In a case where a Euclid distance of the intermediate decoding word is shorter than a Euclid distance of the maximum likelihood decoding word candidate, the maximum likelihood decoding word selecting unit updates the maximum likelihood decoding word candidate by using the intermediate decoding word and the test pattern decoding unit does not execute decoding of a test pattern having no possibility that the Euclid distance of the intermediate decoding word becomes shorter than the Euclid distance of the maximum likelihood decoding word candidate.

Abstract: According to one embodiment, a memory system includes a nonvolatile memory, an encoding part configured to generate a plurality of component codes including a first component code and a second component code different from the first component code, by using, as an information symbol, at least one symbol of a plurality of symbols included in user data to be written into the nonvolatile memory, and a memory interface configured to write the plurality of component codes into the nonvolatile memory. The encoding part includes a plurality of encoders each configured to generate a parity corresponding to each of the plurality of component codes, and a first distributor configured to divide a first symbol string of the user data into a plurality of chunks, each of which has a first symbol length smaller than that of the first symbol string, and to input each of the plurality of chunks generated by the division, into any one f at least different two of the plurality of encoders.

Abstract: According to an embodiment, a memory controller for controlling a nonvolatile memory in which multi-dimensional error correction code having two or more component codes is stored, the memory controller configured to read out the multi-dimensional error correction code; acquire a received word of the multi-dimensional error correction code; hold an intermediate decoded word of the multi-dimensional error correction code; perform a first decoding process which is decoding a first component code included in the intermediate decoded word; when a first error symbol included in the first component code is detected by the first decoding process, perform a first rewriting process which is rewriting a value corresponding to the first error symbol in the intermediate decoded word, and record first recurrence information for reproducing a value of the first error symbol before rewriting; perform a second decoding process which is decoding a second component code included in the intermediate decoded word, of which dimens

Abstract: According to one embodiment, a decoding device that decodes a multi-dimensional error correction code having two or more component codes includes a storage unit that stores therein the multi-dimensional error correction code, an additional-information storage unit that manages each syndrome of the at least two component codes or a reliability flag indicating whether the syndrome has a value of 0 or other than 0, a decoder that performs a first decoding process in a unit of component code with respect to the multi-dimensional error correction code stored in the storage unit to detect an error vector of each component code, and a detection unit that determines whether detection of the error vector by the decoder is false detection, based on the syndrome or the reliability flag stored in the additional-information storage unit.

Abstract: A memory system includes a non-volatile memory and a controller. The controller is configured to maintain a relationship between a first parameter value and a second parameter value for each of some pages of the non-volatile memory, determine a first parameter value to be used for reading data from a target page of the non-volatile memory based on a first parameter value of a first page and a first parameter value of a second page, when the relationship is maintained for each of the first and second pages and is not maintained for the target page, and carry out a read operation with respect to the target page using the determined first parameter value.

Abstract: A memory controller according to an embodiment includes a memory interface that reads out a received word from a non-volatile memory and a decoder that performs bounded distance decoding for the read received word. The decoder sets rm (rm is a natural number equal to or larger than 1) symbols of a plurality of symbols constituting the received word, as options of symbol positions at each of which an error is assumed, generates a test pattern in which m (m is a natural number equal to or larger than 1 and equal to or smaller than the rm) symbols of the rm symbols are objects of rewriting, generates test hard-decision values by rewriting each of hard-decision values of the m symbols that are objects of rewriting in the test pattern, among the symbols, and performs bounded distance decoding for the test hard-decision values.

Abstract: According to one embodiment, a controller groups a plurality of memory cells in each of the pages into a plurality of groups. The plurality of groups includes a first group and a second group. In a case of reading data from a first page, The controller performs first reading. The first reading includes reading data from the first page by using a first operation parameter for the first group. The controller performs second reading. The second reading includes reading data from the first page by using a second operation parameter for the second group. The controller merges first read data and second read data, and return the merged data as read data read from the first page. The first read data is acquired by the first reading. The second read data is acquired by the second reading.