Abstract: The present invention provides a cluster system that promptly stops access to a shared disk upon occurrence of abnormality. The cluster system is a cluster system where an active system server and a standby system server operate utilizing a shared disk. Each server includes: a disk input/output unit that accesses the shared disk by using data that is input and output via a predetermined bus; a fault detecting unit that, when a fault occurs in the active system server, detects the fault; and a bus closing unit that, when the fault detecting unit detects the fault, closes the bus by issuing an uncorrectable fault generation request to cause generation of an uncorrectable fault on the bus.

Abstract: In an information processing system including I/O cards provided with redundancy, the disclosed system and method realize a fail-over that enables improvement of the availability of the information processing apparatus. An information processing system constituting the information processing apparatus includes first and second I/O cards; a BIOS that performs a detection of a correctable failure of the first I/O card; a predictive monitoring unit that performs a predictive detection of a sign of an occurrence of a hardware failure of the first I/O card when a result of the detection of the correctable failure indicates an occurrence of the correctable failure; and an OS that disconnects the first I/O card and performs switching from the first I/O card to the second I/O card when a result of the predictive detection indicates an existence of the sign of the occurrence of the hardware failure of the first I/O card.

Abstract: The present invention provides a cluster system that promptly stops access to a shared disk upon occurrence of abnormality. The cluster system is a cluster system where an active system server and a standby system server operate utilizing a shared disk. Each server includes: a disk input/output unit that accesses the shared disk by using data that is input and output via a predetermined bus; a fault detecting unit that, when a fault occurs in the active system server, detects the fault; and a bus closing unit that, when the fault detecting unit detects the fault, closes the bus by issuing an uncorrectable fault generation request to cause generation of an uncorrectable fault on the bus.

Abstract: A processor according to an exemplary of the invention includes a first initialization unit which reads a first program for checking a reliability of the processor into a cache memory and executes the first program when the processor is started up, and a second initialization unit which reads a second program for checking a reliability of the cache memory into a predetermined memory area and executes the second program when the second initialization unit receives a notification indicating the completion of the establishment of a communication path between the predetermined memory area and the processor from another processor which exists in a partition in which the processor is added.

Abstract: Preventing time out of an IO transaction during CPU re-initialization by controlling the IO transaction so that the time when the IO transaction is continuously stopped during the CPU re-initialization process is within a predetermined time that prevents complete time out of an interrupt of an IO transaction. In a case where the IO transaction would be continuously stopped for greater than the predetermined time during a CPU re-initialization the IO transaction is stopped and restarted within the predetermined time. The status of the interrupt during such stopping and starting is stored so as not to loose the interrupt status during the interval between such stopping and starting.

Abstract: A bus fault detecting unit 21 detects a closed PCI bus, and outputs to an OS 1, a PCI card disconnection instructing signal that requires the OS 1 to disconnect PCI cards connected to the closed PCI bus and PCI buses downstream of this PCI bus. The OS 1 disconnects the designated PCI cards from its control, and outputs to a BIOS 2, a power-off instructing signal that instructs to turn off the power of the disconnected PCI cards. In response to this, a PCI card disconnection handling unit 23 activates a bus diagnosing unit 24, and the bus diagnosing unit 24 diagnoses whether the closed PCI bus functions normally or not. In a case where the closed PCI bus functions normally, a bus opening unit 25 opens the closed PCI bus.

Abstract: Preventing time out of an IO transaction during CPU re-initialization by controlling the IO transaction so that the time when the IO transaction is continuously stopped during the CPU re-initialization process is within a predetermined time that prevents complete time out of an interrupt of an IO transaction. In a case where the IO transaction would be continuously stopped for greater than the predetermined time during a CPU re-initialization the IO transaction is stopped and restarted within the predetermined time. The status of the interrupt during such stopping and starting is stored so as not to loose the interrupt status during the interval between such stopping and starting.

Abstract: A processor according to an exemplary of the invention includes a first initialization unit which reads a first program for checking a reliability of the processor into a cache memory and executes the first program when the processor is started up, and a second initialization unit which reads a second program for checking a reliability of the cache memory into a predetermined memory area and executes the second program when the second initialization unit receives a notification indicating the completion of the establishment of a communication path between the predetermined memory area and the processor from another processor which exists in a partition in which the processor is added.

Abstract: A bus fault detecting unit 21 detects a closed PCI bus, and outputs to an OS 1, a PCI card disconnection instructing signal that requires the OS 1 to disconnect PCI cards connected to the closed PCI bus and PCI buses downstream of this PCI bus. The OS 1 disconnects the designated PCI cards from its control, and outputs to a BIOS 2, a power-off instructing signal that instructs to turn off the power of the disconnected PCI cards. In response to this, a PCI card disconnection handling unit 23 activates a bus diagnosing unit 24, and the bus diagnosing unit 24 diagnoses whether the closed PCI bus functions normally or not. In a case where the closed PCI bus functions normally, a bus opening unit 25 opens the closed PCI bus.