Patents by Inventor Daisuke Hino
Daisuke Hino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210359286Abstract: Provided is a solid-state battery in which single cell bodies as a solid-state thin film battery are more suitably stacked. In the solid-state battery technology, an adhesive layer is provided between a plurality of stacked single cell bodies and the adhesive layer is configured to cover each cell element portion.Type: ApplicationFiled: July 30, 2021Publication date: November 18, 2021Inventors: Yoshitaka MATSUKI, Hiroaki INOUE, Daisuke HINO, Susumu SATO
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Patent number: 9145505Abstract: There is provided an insulated wire including: a conductor wire; and a polyamide-imide insulation coating formed around the conductor wire, the polyamide-imide insulation coating being made from a polyamide-imide resin based insulating varnish, the varnish being synthesized by reaction of an isocyanate constituent and an acid constituent in a solvent, the isocyanate constituent including 5 to 50 mol % of 2,4?-diphenylmethane-diisocyanate having a flexible molecular structure.Type: GrantFiled: August 27, 2010Date of Patent: September 29, 2015Assignee: Hitachi Metals, Ltd.Inventors: Hideyuki Kikuchi, Daisuke Hino, Yuji Takano, Yasuhiro Funayama
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Patent number: 9006865Abstract: In heteroepitaxially growing a group-III nitride semiconductor on a Si single crystal substrate, the occurrence of cracks initiating in the wafer edge portion can be suppressed. Region A is an outermost peripheral portion outside the principal surface, being a bevel portion tapered. Regions B and C are on the same plane (the principal surface), region B (mirror-surface portion) being the center portion of the principal surface, and region C a region in the principal surface edge portion surrounding region B. The principal surface has a plane orientation, and in region B, is mirror-surface-finished. Region B occupies most of the principal surface of this Si single crystal substrate, and a semiconductor device is manufactured therein. Region C (surface-roughened portion) has a plane orientation as with region B, however, region B is mirror-surface-finished, whereas region C is surface-roughened.Type: GrantFiled: June 24, 2011Date of Patent: April 14, 2015Assignee: Dowa Electronics Materials Co., Ltd.Inventors: Tetsuya Ikuta, Daisuke Hino, Tomohiko Shibata
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Patent number: 8946863Abstract: An epitaxial substrate for electronic devices, in which current flows in a lateral direction and of which warpage configuration is properly controlled, and a method of producing the same. The epitaxial substrate for electronic devices is produced by forming a bonded substrate by bonding a low-resistance Si single crystal substrate and a high-resistance Si single crystal substrate together; forming a buffer as an insulating layer on a surface of the bonded substrate on the high-resistance Si single crystal substrate side; and producing an epitaxial substrate by epitaxially growing a plurality of III-nitride layers on the buffer to form a main laminate. The resistivity of the low-resistance Si single crystal substrate is 100 ?·cm or less, and the resistivity of the high-resistance Si single crystal substrate is 1000 ?·cm or more.Type: GrantFiled: August 2, 2010Date of Patent: February 3, 2015Assignee: Dowa Electronics Materials Co., Ltd.Inventors: Tetsuya Ikuta, Daisuke Hino, Ryo Sakamoto, Tomohiko Shibata
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Publication number: 20140285214Abstract: An electrical insulating property tester includes a guaranteed voltage applying unit for applying a guaranteed voltage to a running line provided with an electrical insulating layer around an electrical conducting wire, a grounding unit arranged downstream of the guaranteed voltage applying unit, for grounding the running line to thereby remove electric charge electrostatically induced on the running line, and a test voltage applying unit arranged downstream of the grounding unit, for applying a test voltage lower than the guaranteed voltage to the running line, to thereby detect a leakage current value.Type: ApplicationFiled: February 26, 2014Publication date: September 25, 2014Applicant: Hitachi Metals, Ltd.Inventors: XIE Peng, Hideyuki Kikuchi, Daisuke Hino
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Patent number: 8809684Abstract: There is provided an insulated wire including a wire conductor and an insulation coating formed on the wire conductor by extrusion coating a resin composition. The resin composition is a mixture of a polyphenylene sulfide-based resin (A) and a polyamide-based resin (B), in which a ratio of parts by mass of the resin (B) to that of the resin (A), i.e. (B)/(A), is not less than 5/95 and not more than 30/70.Type: GrantFiled: March 30, 2011Date of Patent: August 19, 2014Assignee: Hitachi Metals, Ltd.Inventors: Takanori Yamazaki, Kiyoshi Watanabe, Junichi Abe, Hideyuki Kikuchi, Daisuke Hino
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Patent number: 8741441Abstract: An insulated wire includes a conductor, and an insulating covering layer formed on a periphery of the conductor and including two or more insulating coatings. The insulating coatings include a polyamide-imide resin insulating material represented by chemical formula 1: where R indicates a divalent aromatic diamine including three or more aromatic rings. The insulating coatings are formed by applying and baking the polyamide-imide resin insulating material, and the polyamide-imide resin insulating material is obtained by reacting an imide group containing dicarboxylic acid with a diisocyanate, the imide group containing dicarboxylic acid being obtained by dehydration reaction of a diamine comprising a divalent aromatic diamine including three or more aromatic rings with an acid using an azeotropic solvent.Type: GrantFiled: July 2, 2010Date of Patent: June 3, 2014Assignee: Hitachi Metals, Ltd.Inventors: Yuki Honda, Tomiya Abe, Hideyuki Kikuchi, Daisuke Hino
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Patent number: 8710489Abstract: To provide an epitaxial substrate for electronic devices, in which current flows in a lateral direction, which enables accurate measurement of the sheet resistance of HEMTs without contact, and to provide a method of efficiently producing the epitaxial substrate for electronic devices, the method characteristically includes the steps of forming a barrier layer against impurity diffusion on one surface of a high-resistance Si-single crystal substrate, forming a buffer as an insulating layer on the other surface of the high-resistance Si-single crystal substrate, producing an epitaxial substrate by epitaxially growing a plurality of III-nitride layers on the buffer to form a main laminate, and measuring resistance of the main laminate of the epitaxial substrate without contact.Type: GrantFiled: July 13, 2010Date of Patent: April 29, 2014Assignee: Dowa Electronics Materials Co., Ltd.Inventors: Tetsuya Ikuta, Daisuke Hino, Ryo Sakamoto, Tomohiko Shibata
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Patent number: 8679628Abstract: There is provided an insulated wire equipped with an insulation film made of polymer alloy, the polymer alloy comprising an amorphous thermosetting resin and an amorphous thermoplastic resin, in which: the insulation film has a sea-island structure; the amorphous thermosetting resin is a sea component of the sea-island structure; and the amorphous thermoplastic resin is an island component of the sea-island structure.Type: GrantFiled: June 16, 2010Date of Patent: March 25, 2014Assignees: Hitachi Cable, Ltd., Hitachi Metals, Ltd.Inventors: Yuki Honda, Tomiya Abe, Hideyuki Kikuchi, Daisuke Hino
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Patent number: 8569628Abstract: There is provided an insulated wire having an insulation film composed of a plurality of layers provided on a conductor, in which: the insulation film includes a first film layer and a second film layer; the first film layer is made of a first resin composition formed by graft-polymerizing a graft compound with an ethylene-tetrafluoroethylene copolymer and is provided on a circumference of the conductor; and the second film layer is made of a second resin composition being a polymer alloy made of a polyphenylene sulfide resin and a polyamide resin, or being a polymer alloy made of a polyether ether ketone resin and a polyamide resin and is provided on a circumference of the first film layer.Type: GrantFiled: August 27, 2010Date of Patent: October 29, 2013Assignees: Hitachi Cable, Ltd., Hitachi Magnet Wire Corp.Inventors: Tomiya Abe, Takanori Yamazaki, Kiyoshi Watanabe, Hideyuki Kikuchi, Takahiko Hanada, Daisuke Hino
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Publication number: 20130087807Abstract: In heteroepitaxially growing a group-III nitride semiconductor on a Si single crystal substrate, the occurrence of cracks initiating in the wafer edge portion can be suppressed. Region A is an outermost peripheral portion outside the principal surface, being a bevel portion tapered. Regions B and C are on the same plane (the principal surface), region B (mirror-surface portion) being the center portion of the principal surface, and region C a region in the principal surface edge portion surrounding region B. The principal surface has a plane orientation, and in region B, is mirror-surface-finished. Region B occupies most of the principal surface of this Si single crystal substrate, and a semiconductor device is manufactured therein. Region C (surface-roughened portion) has a plane orientation as with region B, however, region B is mirror-surface-finished, whereas region C is surface-roughened.Type: ApplicationFiled: June 24, 2011Publication date: April 11, 2013Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.Inventors: Tetsuya Ikuta, Daisuke Hino, Tomohiko Shibata
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Publication number: 20120168719Abstract: To provide an epitaxial substrate for electronic devices, in which current flows in a lateral direction, which enables accurate measurement of the sheet resistance of HEMTs without contact, and to provide a method of efficiently producing the epitaxial substrate for electronic devices, the method characteristically includes the steps of forming a barrier layer against impurity diffusion on one surface of a high-resistance Si-single crystal substrate, forming a buffer as an insulating layer on the other surface of the high-resistance Si-single crystal substrate, producing an epitaxial substrate by epitaxially growing a plurality of III-nitride layers on the buffer to form a main laminate, and measuring resistance of the main laminate of the epitaxial substrate without contact.Type: ApplicationFiled: July 13, 2010Publication date: July 5, 2012Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.Inventors: Tetsuya Ikuta, Daisuke Hino, Ryo Sakamoto, Tomohiko Shibata
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Publication number: 20120153440Abstract: An epitaxial substrate for electronic devices, in which current flows in a lateral direction and of which warpage configuration is properly controlled, and a method of producing the same. The epitaxial substrate for electronic devices is produced by forming a bonded substrate by bonding a low-resistance Si single crystal substrate and a high-resistance Si single crystal substrate together; forming a buffer as an insulating layer on a surface of the bonded substrate on the high-resistance Si single crystal substrate side; and producing an epitaxial substrate by epitaxially growing a plurality of III-nitride layers on the buffer to form a main laminate. The resistivity of the low-resistance Si single crystal substrate is 100 ?·cm or less, and the resistivity of the high-resistance Si single crystal substrate is 1000 ?·cm or more.Type: ApplicationFiled: August 2, 2010Publication date: June 21, 2012Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.Inventors: Tetsuya Ikuta, Daisuke Hino, Ryo Sakamoto, Tomohiko Shibata
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Publication number: 20110240332Abstract: There is provided an insulated wire including a wire conductor and an insulation coating formed on the wire conductor by extrusion coating a resin composition. The resin composition is a mixture of a polyphenylene sulfide-based resin (A) and a polyamide-based resin (B), in which a ratio of parts by mass of the resin (B) to that of the resin (A), i.e. (B)/(A), is not less than 5/95 and not more than 30/70.Type: ApplicationFiled: March 30, 2011Publication date: October 6, 2011Inventors: Takanori YAMAZAKI, Kiyoshi WATANABE, Junichi ABE, Hideyuki KIKUCHI, Daisuke HINO
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Publication number: 20110192632Abstract: There is provided an insulated wire having an insulation film composed of a plurality of layers provided on a conductor, in which: the insulation film includes a first film layer and a second film layer; the first film layer is made of a first resin composition formed by graft-polymerizing a graft compound with an ethylene-tetrafluoroethylene copolymer and is provided on a circumference of the conductor; and the second film layer is made of a second resin composition being a polymer alloy made of a polyphenylene sulfide resin and a polyamide resin, or being a polymer alloy made of a polyether ether ketone resin and a polyamide resin and is provided on a circumference of the first film layer.Type: ApplicationFiled: August 27, 2010Publication date: August 11, 2011Inventors: Tomiya ABE, Takanori Yamazaki, Kiyoshi Watanabe, Hideyuki Kikuchi, Takahiko Hanada, Daisuke Hino
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Publication number: 20110127067Abstract: An insulated wire includes a conductor, and an insulating covering layer formed on a periphery of the conductor and including two or more insulating coatings. The insulating coatings include a polyamide-imide resin insulating material represented by chemical formula 1: where R indicates a divalent aromatic diamine including three or more aromatic rings. The insulating coatings are formed by applying and baking the polyamide-imide resin insulating material, and the polyamide-imide resin insulating material is obtained by reacting an imide group containing dicarboxylic acid with a diisocyanate, the imide group containing dicarboxylic acid being obtained by dehydration reaction of a diamine comprising a divalent aromatic diamine including three or more aromatic rings with an acid using an azeotropic solvent.Type: ApplicationFiled: July 2, 2010Publication date: June 2, 2011Applicants: HITACHI CABLE, LTD., HITACHI MAGNET WIRE CORP.Inventors: Yuki HONDA, Tomiya ABE, Hideyuki KIKUCHI, Daisuke HINO
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Publication number: 20110048766Abstract: There is provided an insulated wire including: a conductor wire; and a polyamide-imide insulation coating formed around the conductor wire, the polyamide-imide insulation coating being made from a polyamide-imide resin based insulating varnish, the varnish being synthesized by reaction of an isocyanate constituent and an acid constituent in a solvent, the isocyanate constituent including 5 to 50 mol % of 2,4?-diphenylmethane-diisocyanate having a flexible molecular structure.Type: ApplicationFiled: August 27, 2010Publication date: March 3, 2011Inventors: Hideyuki KIKUCHI, Daisuke Hino, Yuji Takano, Yasuhiro Funayama
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Publication number: 20100319961Abstract: There is provided an insulated wire equipped with an insulation film made of polymer alloy, the polymer alloy comprising an amorphous thermosetting resin and an amorphous thermoplastic resin, in which: the insulation film has a sea-island structure; the amorphous thermosetting resin is a sea component of the sea-island structure; and the amorphous thermoplastic resin is an island component of the sea-island structure.Type: ApplicationFiled: June 16, 2010Publication date: December 23, 2010Inventors: Yuki HONDA, Tomiya ABE, Hideyuki KIKUCHI, Daisuke HINO
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Patent number: 7737296Abstract: A simple and easy-to-use method for producing a 2-hydroxyester compound using a cyanohydrin compound, as a raw material, is provided.Type: GrantFiled: August 8, 2006Date of Patent: June 15, 2010Assignee: Nippoh Chemicals Co., Ltd.Inventors: Ichiro Kozono, Naoki Fujiwara, Daisuke Hino
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Publication number: 20080214861Abstract: A simple and easy-to-use method for producing a 2-hydroxyester compound using a cyanohydrin compound, as a raw material, is provided.Type: ApplicationFiled: August 8, 2006Publication date: September 4, 2008Applicant: NIPPOH CHEMICALS CO., LTDInventors: Ichiro Kozono, Naoki Fujiwara, Daisuke Hino