Patents by Inventor Daisuke Hiraoka
Daisuke Hiraoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210358654Abstract: A substrate is transparent and has a mesh shape conductor pattern. In a first substrate, a conductor pattern includes arrays of circular closed curves, and respective adjacent arrays include arrays different in period, waveform, or phase. In a second substrate, the mesh shape is formed by two or more types of circular closed curves. In a third substrate, the mesh shape is formed by three or more types of circular closed curves. In a fourth substrate, a single type of circular closed curves is used, and one circular closed curve is surrounded by six circular closed curves. In a fifth substrate, a single type of circular closed curves is used. However, four circles contact with one circle at top, bottom, left, and right, is excluded. In a sixth substrate, one or more types of circular closed curves are used, and three or more types of openings are formed.Type: ApplicationFiled: June 4, 2018Publication date: November 18, 2021Applicant: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITEDInventors: Kenta TSUCHIYA, Daisuke HIRAOKA, Osamu HIRATA
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Patent number: 10998609Abstract: This loop antenna is provided with: an insulating substrate; an antenna portion that is a conductor provided on the substrate and includes a first feeding portion, a second feeding portion, and an antenna mesh portion having a mesh structure and forming a loop shape by connecting the two feeding portions to each other; and a dummy pattern part portion that is a conductor having a mesh structure and provided in a region surrounded by the antenna portion, and is isolated from the antenna portion. The dummy pattern portion has at least one cut portion that cuts a path included in the mesh structure.Type: GrantFiled: January 23, 2018Date of Patent: May 4, 2021Assignee: Japan Aviation Electronics Industry, LimitedInventors: Kenta Tsuchiya, Osamu Hirata, Daisuke Hiraoka, Mitsunori Sato, Yutaka Takezawa, Yutaro Kogawa
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Publication number: 20200203830Abstract: This loop antenna is provided with: an insulating substrate; an antenna portion that is a conductor provided on the substrate and includes a first feeding portion, a second feeding portion, and an antenna mesh portion having a mesh structure and forming a loop shape by connecting the two feeding portions to each other; and a dummy pattern part portion that is a conductor having a mesh structure and provided in a region surrounded by the antenna portion, and is isolated from the antenna portion. The dummy pattern portion has at least one cut portion that cuts a path included in the mesh structure.Type: ApplicationFiled: January 23, 2018Publication date: June 25, 2020Applicant: Japan Aviation Electronics Industry, LimitedInventors: Kenta TSUCHIYA, Osamu HIRATA, Daisuke HIRAOKA, Mitsunori SATO, Yutaka TAKEZAWA, Yutaro KOGAWA
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Patent number: 9921682Abstract: In a touch panel in which a sensor electrode array, frame wiring set that is located outside the sensor electrode array and connected to the sensor electrode array, and a first outer ground wiring line located outside the frame wiring set are formed on a transparent substrate of the touch panel, shielding wiring covering the frame wiring set is provided, with an insulating layer placed between the frame wiring set and the shielding wiring, and a second outer ground wiring line is provided outside the shielding wiring. The shielding wiring is connected to a ground wiring line included in the frame wiring set through a hole formed in the insulating layer and is insulated from the second outer ground wiring line.Type: GrantFiled: July 27, 2016Date of Patent: March 20, 2018Assignee: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITEDInventors: Mitsunori Sato, Osamu Hirata, Daisuke Hiraoka, Joji Akizuki, Yutaka Takezawa, Hiroshi Okumura, Yutaro Kogawa
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Publication number: 20170090652Abstract: In a touch panel in which a sensor electrode array, frame wiring set that is located outside the sensor electrode array and connected to the sensor electrode array, and a first outer ground wiring line located outside the frame wiring set are formed on a transparent substrate of the touch panel, shielding wiring covering the frame wiring set is provided, with an insulating layer placed between the frame wiring set and the shielding wiring, and a second outer ground wiring line is provided outside the shielding wiring. The shielding wiring is connected to a ground wiring line included in the frame wiring set through a hole formed in the insulating layer and is insulated from the second outer ground wiring line.Type: ApplicationFiled: July 27, 2016Publication date: March 30, 2017Applicant: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITEDInventors: Mitsunori SATO, Osamu HIRATA, Daisuke HIRAOKA, Joji AKIZUKI, Yutaka TAKEZAWA, Hiroshi OKUMURA, Yutaro KOGAWA
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Patent number: 8844176Abstract: A conveying apparatus includes a first roller that is rotational to convey a nonwoven fabric and a second roller that is rotational to convey the nonwoven fabric and is located on the trailing side of the first roller with respect to the conveying direction of the nonwoven fabric. The conveying apparatus includes a noncontact sensor and a controller. The noncontact sensor detects the distance from the nonwoven fabric at a position between the first roller and the second roller. The controller uses the distance detected by the sensor to compute the slack amount of the nonwoven fabric and controls the rotation speed of the second roller, thereby reducing the difference between the computed slack amount and a predetermined target value.Type: GrantFiled: April 22, 2013Date of Patent: September 30, 2014Assignee: Toyota Boshoku Kabushiki KaishaInventors: Daisuke Hiraoka, Masayuki Shirata
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Publication number: 20130298431Abstract: A conveying apparatus includes a first roller that is rotational to convey a nonwoven fabric and a second roller that is rotational to convey the nonwoven fabric and is located on the trailing side of the first roller with respect to the conveying direction of the nonwoven fabric. The conveying apparatus includes a noncontact sensor and a controller. The noncontact sensor detects the distance from the nonwoven fabric at a position between the first roller and the second roller. The controller uses the distance detected by the sensor to compute the slack amount of the nonwoven fabric and controls the rotation speed of the second roller, thereby reducing the difference between the computed slack amount and a predetermined target value.Type: ApplicationFiled: April 22, 2013Publication date: November 14, 2013Applicant: TOYOTA BOSHOKU KABUSHIKI KAISHAInventors: Daisuke HIRAOKA, Masayuki SHIRATA
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Patent number: 7926023Abstract: Methods and apparatus are provided for: monitoring processor tasks and associated processor loads therefor that are allocated to be performed by respective sub-processing units associated with a main processing unit; detecting whether a processing error has occurred in a given one of the sub-processing units; re-allocating all of the processor tasks of the given sub-processing unit to one or more participating sub-processing units, including other sub-processing units associated with the main processing unit, based on the processor loads of the processor tasks of the given sub-processing unit and the processor loads of the participating sub-processing units; and at least one of: (i) shutting down, and (ii) re-booting the given sub-processing unit.Type: GrantFiled: December 6, 2007Date of Patent: April 12, 2011Assignee: Sony Computer Entertainment Inc.Inventors: Yasukichi Okawa, Daisuke Hiraoka, Koji Hirairi, Tatsuya Koyama
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Patent number: 7743219Abstract: An information processing unit, a computer control method, and an information storage device are provided to acquire performance information during data processing and realize efficient data processing by changing data processing details as appropriate based on the information.Type: GrantFiled: April 11, 2006Date of Patent: June 22, 2010Assignee: Sony Computer Entertainment Inc.Inventor: Daisuke Hiraoka
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Patent number: 7730456Abstract: Methods and apparatus are provided for: monitoring processor tasks and associated processor loads therefor that are allocated to be performed by respective sub-processing units associated with a main processing unit; detecting whether a processing error has occurred in a given one of the sub-processing units; re-allocating all of the processor tasks of the given sub-processing unit to one or more participating sub-processing units, including other sub-processing units associated with the main processing unit, based on the processor loads of the processor tasks of the given sub-processing unit and the processor loads of the participating sub-processing units; and at least one of: (i) shutting down, and (ii) re-booting the given sub-processing unit.Type: GrantFiled: May 19, 2004Date of Patent: June 1, 2010Assignee: Sony Computer Entertainment Inc.Inventors: Yasukichi Okawa, Daisuke Hiraoka, Koji Hirairi, Tatsuya Koyama
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Publication number: 20080098260Abstract: Methods and apparatus are provided for: monitoring processor tasks and associated processor loads therefor that are allocated to be performed by respective sub-processing units associated with a main processing unit; detecting whether a processing error has occurred in a given one of the sub-processing units; re-allocating all of the processor tasks of the given sub-processing unit to one or more participating sub-processing units, including other sub-processing units associated with the main processing unit, based on the processor loads of the processor tasks of the given sub-processing unit and the processor loads of the participating sub-processing units; and at least one of: (i) shutting down, and (ii) re-booting the given sub-processing unit.Type: ApplicationFiled: December 6, 2007Publication date: April 24, 2008Applicant: Sony Computer Entertainment Inc.Inventors: Yasukichi Okawa, Daisuke Hiraoka, Koji Hirairi, Tatsuya Koyama
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Patent number: 7211760Abstract: A membrane switch which can be opened and closed with a small pushing load. A fixed contact point 4 is formed on one surface of a first sheet 3. Flexible movable contact points 7 opposed to the fixed contact point 4 via a space in a manner movable to and way from the fixed contact point 4 are formed on one surface of a second sheet 6, opposed to the one surface of the first sheet 3. Insulators are arranged on the flexible movable contact points at locations except for the locations of push portions of the flexible movable contact points 7.Type: GrantFiled: December 6, 2005Date of Patent: May 1, 2007Assignee: Japan Aviation Electronics Industry LimitedInventors: Tsuyoshi Takiguchi, Daisuke Hiraoka, Osamu Hirata, Tadanao Matsumoto, Naoki Iwao
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Publication number: 20070011689Abstract: An information processing unit, a computer control method, and an information storage device are provided to acquire performance information during data processing and realize efficient data processing by changing data processing details as appropriate based on the information.Type: ApplicationFiled: April 11, 2006Publication date: January 11, 2007Inventor: Daisuke Hiraoka
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Publication number: 20060131158Abstract: A membrane switch which can be opened and closed with a small pushing load. A fixed contact point 4 is formed on one surface of a first sheet 3. Flexible movable contact points 7 opposed to the fixed contact point 4 via a space in a manner movable to and way from the fixed contact point 4 are formed on one surface of a second sheet 6, opposed to the one surface of the first sheet 3. Insulators are arranged on the flexible movable contact points at locations except for the locations of push portions of the flexible movable contact points 7.Type: ApplicationFiled: December 6, 2005Publication date: June 22, 2006Applicant: Japan Aviation Electronics Industry, LimitedInventors: Tsuyoshi Takiguchi, Daisuke Hiraoka, Osamu Hirata, Tadanao Matsumoto, Naoki Iwao
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Publication number: 20060129999Abstract: Methods and apparatus provide for: producing trace data from program status data received from at least one processor, the at least one processor being operable to execute software by addressing instructions in accordance with addresses obtained from a program counter; and storing the trace data in a trace buffer, wherein the trace data includes: (i) aggregate counts of respective program execution events; (ii) the addresses obtained from the program counter at various times; and (iii) bookmark data containing program performance information that includes neither the aggregate counts nor the addresses.Type: ApplicationFiled: November 16, 2004Publication date: June 15, 2006Inventors: Daisuke Hiraoka, Masaki Osawa
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Publication number: 20050273652Abstract: Methods and apparatus are provided for: monitoring processor tasks and associated processor loads therefor that are allocated to be performed by respective sub-processing units associated with a main processing unit; detecting whether a processing error has occurred in a given one of the sub-processing units; re-allocating all of the processor tasks of the given sub-processing unit to one or more participating sub-processing units, including other sub-processing units associated with the main processing unit, based on the processor loads of the processor tasks of the given sub-processing unit and the processor loads of the participating sub-processing units; and at least one of: (i) shutting down, and (ii) re-booting the given sub-processing unit.Type: ApplicationFiled: May 19, 2004Publication date: December 8, 2005Applicant: Sony Computer Entertainment Inc.Inventors: Yasukichi Okawa, Daisuke Hiraoka, Koji Hirairi, Tatsuya Koyama
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Publication number: 20030152111Abstract: A multiplexing processor multiplexes internal signals of a system LSI to be verified at a clock rate higher than that of the internal bus lines of the system LSI so as to create a multiplexed internal signal to be output. Thus, internal signals on target bus lines can be taken out of the system LSI using a small number of signal lines. Therefore, without considerably increasing the number of output terminals of the system LSI, the internal signals can be taken out through the smallest number of additional output terminals. This results in an easy verifying process for the entire operation of the system LSI without the need for a complicated design of the system LSI or an increase in cost of the system LSI.Type: ApplicationFiled: May 24, 2002Publication date: August 14, 2003Applicant: Sony Computer Entertainment Inc.Inventor: Daisuke Hiraoka
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Patent number: 6553200Abstract: A liquid electrophotographic developing apparatus including a developing unit and a plurality of air transport members. The developing unit has an elongated opening disposed adjacent to a moving image-bearing surface of a photoreceptor, and it is used for converting an electrostatic latent image into a toner image. Electrodes formed within the elongated opening provide an electric field to charge toner particles in a liquid developer. The air transport members are provided around the elongated opening of the developing unit, and airflow therein has a predetermined air pressure to transport unused developer away from the image-bearing surface while permitting toner particles in the liquid developer deposited on the image-bearing surface to be retained by the image-bearing surface.Type: GrantFiled: March 27, 2001Date of Patent: April 22, 2003Assignee: Aetas Technology IncorporatedInventors: Yuji Hiraoka, Daisuke Hiraoka
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Publication number: 20020064398Abstract: The present invention discloses a liquid electrophotographic developing apparatus including a developing unit and a plurality of air transport members. The developing unit has an elongated opening disposed adjacent to a moving image-bearing surface of a photoreceptor, and it is used for converting an electrostatic latent image into a toner image. The air transport member is provided around the elongated opening of the developing unit, and airflow therein has a predetermined air pressure to transport unused liquid developer away from the image-bearing surface while permitting toner particles in the liquid developer deposited on the image-bearing surface to be retained by the image-bearing surface.Type: ApplicationFiled: March 27, 2001Publication date: May 30, 2002Inventors: Yuji Hiraoka, Daisuke Hiraoka
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Patent number: 5960445Abstract: BIOS updating is performed after saving an old BIOS to a spare storage area. A current version BIOS stored in a first bank of a flash ROM is moved to a second bank of the flash ROM, and a new BIOS supplied from a home server to a network interface card is stored in the first bank to complete BIOS updating. If the new BIOS does not run well, the old BIOS in the second bank of the flash ROM is moved to the first bank through a RAM to be reinstalled.Type: GrantFiled: April 17, 1997Date of Patent: September 28, 1999Assignee: Sony CorporationInventors: Hirofumi Tamori, Daisuke Hiraoka, Koji Enoki