Patents by Inventor Daisuke Hiraoka

Daisuke Hiraoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210358654
    Abstract: A substrate is transparent and has a mesh shape conductor pattern. In a first substrate, a conductor pattern includes arrays of circular closed curves, and respective adjacent arrays include arrays different in period, waveform, or phase. In a second substrate, the mesh shape is formed by two or more types of circular closed curves. In a third substrate, the mesh shape is formed by three or more types of circular closed curves. In a fourth substrate, a single type of circular closed curves is used, and one circular closed curve is surrounded by six circular closed curves. In a fifth substrate, a single type of circular closed curves is used. However, four circles contact with one circle at top, bottom, left, and right, is excluded. In a sixth substrate, one or more types of circular closed curves are used, and three or more types of openings are formed.
    Type: Application
    Filed: June 4, 2018
    Publication date: November 18, 2021
    Applicant: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED
    Inventors: Kenta TSUCHIYA, Daisuke HIRAOKA, Osamu HIRATA
  • Patent number: 10998609
    Abstract: This loop antenna is provided with: an insulating substrate; an antenna portion that is a conductor provided on the substrate and includes a first feeding portion, a second feeding portion, and an antenna mesh portion having a mesh structure and forming a loop shape by connecting the two feeding portions to each other; and a dummy pattern part portion that is a conductor having a mesh structure and provided in a region surrounded by the antenna portion, and is isolated from the antenna portion. The dummy pattern portion has at least one cut portion that cuts a path included in the mesh structure.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: May 4, 2021
    Assignee: Japan Aviation Electronics Industry, Limited
    Inventors: Kenta Tsuchiya, Osamu Hirata, Daisuke Hiraoka, Mitsunori Sato, Yutaka Takezawa, Yutaro Kogawa
  • Publication number: 20200203830
    Abstract: This loop antenna is provided with: an insulating substrate; an antenna portion that is a conductor provided on the substrate and includes a first feeding portion, a second feeding portion, and an antenna mesh portion having a mesh structure and forming a loop shape by connecting the two feeding portions to each other; and a dummy pattern part portion that is a conductor having a mesh structure and provided in a region surrounded by the antenna portion, and is isolated from the antenna portion. The dummy pattern portion has at least one cut portion that cuts a path included in the mesh structure.
    Type: Application
    Filed: January 23, 2018
    Publication date: June 25, 2020
    Applicant: Japan Aviation Electronics Industry, Limited
    Inventors: Kenta TSUCHIYA, Osamu HIRATA, Daisuke HIRAOKA, Mitsunori SATO, Yutaka TAKEZAWA, Yutaro KOGAWA
  • Patent number: 9921682
    Abstract: In a touch panel in which a sensor electrode array, frame wiring set that is located outside the sensor electrode array and connected to the sensor electrode array, and a first outer ground wiring line located outside the frame wiring set are formed on a transparent substrate of the touch panel, shielding wiring covering the frame wiring set is provided, with an insulating layer placed between the frame wiring set and the shielding wiring, and a second outer ground wiring line is provided outside the shielding wiring. The shielding wiring is connected to a ground wiring line included in the frame wiring set through a hole formed in the insulating layer and is insulated from the second outer ground wiring line.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: March 20, 2018
    Assignee: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED
    Inventors: Mitsunori Sato, Osamu Hirata, Daisuke Hiraoka, Joji Akizuki, Yutaka Takezawa, Hiroshi Okumura, Yutaro Kogawa
  • Publication number: 20170090652
    Abstract: In a touch panel in which a sensor electrode array, frame wiring set that is located outside the sensor electrode array and connected to the sensor electrode array, and a first outer ground wiring line located outside the frame wiring set are formed on a transparent substrate of the touch panel, shielding wiring covering the frame wiring set is provided, with an insulating layer placed between the frame wiring set and the shielding wiring, and a second outer ground wiring line is provided outside the shielding wiring. The shielding wiring is connected to a ground wiring line included in the frame wiring set through a hole formed in the insulating layer and is insulated from the second outer ground wiring line.
    Type: Application
    Filed: July 27, 2016
    Publication date: March 30, 2017
    Applicant: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED
    Inventors: Mitsunori SATO, Osamu HIRATA, Daisuke HIRAOKA, Joji AKIZUKI, Yutaka TAKEZAWA, Hiroshi OKUMURA, Yutaro KOGAWA
  • Patent number: 8844176
    Abstract: A conveying apparatus includes a first roller that is rotational to convey a nonwoven fabric and a second roller that is rotational to convey the nonwoven fabric and is located on the trailing side of the first roller with respect to the conveying direction of the nonwoven fabric. The conveying apparatus includes a noncontact sensor and a controller. The noncontact sensor detects the distance from the nonwoven fabric at a position between the first roller and the second roller. The controller uses the distance detected by the sensor to compute the slack amount of the nonwoven fabric and controls the rotation speed of the second roller, thereby reducing the difference between the computed slack amount and a predetermined target value.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: September 30, 2014
    Assignee: Toyota Boshoku Kabushiki Kaisha
    Inventors: Daisuke Hiraoka, Masayuki Shirata
  • Publication number: 20130298431
    Abstract: A conveying apparatus includes a first roller that is rotational to convey a nonwoven fabric and a second roller that is rotational to convey the nonwoven fabric and is located on the trailing side of the first roller with respect to the conveying direction of the nonwoven fabric. The conveying apparatus includes a noncontact sensor and a controller. The noncontact sensor detects the distance from the nonwoven fabric at a position between the first roller and the second roller. The controller uses the distance detected by the sensor to compute the slack amount of the nonwoven fabric and controls the rotation speed of the second roller, thereby reducing the difference between the computed slack amount and a predetermined target value.
    Type: Application
    Filed: April 22, 2013
    Publication date: November 14, 2013
    Applicant: TOYOTA BOSHOKU KABUSHIKI KAISHA
    Inventors: Daisuke HIRAOKA, Masayuki SHIRATA
  • Patent number: 7926023
    Abstract: Methods and apparatus are provided for: monitoring processor tasks and associated processor loads therefor that are allocated to be performed by respective sub-processing units associated with a main processing unit; detecting whether a processing error has occurred in a given one of the sub-processing units; re-allocating all of the processor tasks of the given sub-processing unit to one or more participating sub-processing units, including other sub-processing units associated with the main processing unit, based on the processor loads of the processor tasks of the given sub-processing unit and the processor loads of the participating sub-processing units; and at least one of: (i) shutting down, and (ii) re-booting the given sub-processing unit.
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: April 12, 2011
    Assignee: Sony Computer Entertainment Inc.
    Inventors: Yasukichi Okawa, Daisuke Hiraoka, Koji Hirairi, Tatsuya Koyama
  • Patent number: 7743219
    Abstract: An information processing unit, a computer control method, and an information storage device are provided to acquire performance information during data processing and realize efficient data processing by changing data processing details as appropriate based on the information.
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: June 22, 2010
    Assignee: Sony Computer Entertainment Inc.
    Inventor: Daisuke Hiraoka
  • Patent number: 7730456
    Abstract: Methods and apparatus are provided for: monitoring processor tasks and associated processor loads therefor that are allocated to be performed by respective sub-processing units associated with a main processing unit; detecting whether a processing error has occurred in a given one of the sub-processing units; re-allocating all of the processor tasks of the given sub-processing unit to one or more participating sub-processing units, including other sub-processing units associated with the main processing unit, based on the processor loads of the processor tasks of the given sub-processing unit and the processor loads of the participating sub-processing units; and at least one of: (i) shutting down, and (ii) re-booting the given sub-processing unit.
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: June 1, 2010
    Assignee: Sony Computer Entertainment Inc.
    Inventors: Yasukichi Okawa, Daisuke Hiraoka, Koji Hirairi, Tatsuya Koyama
  • Publication number: 20080098260
    Abstract: Methods and apparatus are provided for: monitoring processor tasks and associated processor loads therefor that are allocated to be performed by respective sub-processing units associated with a main processing unit; detecting whether a processing error has occurred in a given one of the sub-processing units; re-allocating all of the processor tasks of the given sub-processing unit to one or more participating sub-processing units, including other sub-processing units associated with the main processing unit, based on the processor loads of the processor tasks of the given sub-processing unit and the processor loads of the participating sub-processing units; and at least one of: (i) shutting down, and (ii) re-booting the given sub-processing unit.
    Type: Application
    Filed: December 6, 2007
    Publication date: April 24, 2008
    Applicant: Sony Computer Entertainment Inc.
    Inventors: Yasukichi Okawa, Daisuke Hiraoka, Koji Hirairi, Tatsuya Koyama
  • Patent number: 7211760
    Abstract: A membrane switch which can be opened and closed with a small pushing load. A fixed contact point 4 is formed on one surface of a first sheet 3. Flexible movable contact points 7 opposed to the fixed contact point 4 via a space in a manner movable to and way from the fixed contact point 4 are formed on one surface of a second sheet 6, opposed to the one surface of the first sheet 3. Insulators are arranged on the flexible movable contact points at locations except for the locations of push portions of the flexible movable contact points 7.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: May 1, 2007
    Assignee: Japan Aviation Electronics Industry Limited
    Inventors: Tsuyoshi Takiguchi, Daisuke Hiraoka, Osamu Hirata, Tadanao Matsumoto, Naoki Iwao
  • Publication number: 20070011689
    Abstract: An information processing unit, a computer control method, and an information storage device are provided to acquire performance information during data processing and realize efficient data processing by changing data processing details as appropriate based on the information.
    Type: Application
    Filed: April 11, 2006
    Publication date: January 11, 2007
    Inventor: Daisuke Hiraoka
  • Publication number: 20060131158
    Abstract: A membrane switch which can be opened and closed with a small pushing load. A fixed contact point 4 is formed on one surface of a first sheet 3. Flexible movable contact points 7 opposed to the fixed contact point 4 via a space in a manner movable to and way from the fixed contact point 4 are formed on one surface of a second sheet 6, opposed to the one surface of the first sheet 3. Insulators are arranged on the flexible movable contact points at locations except for the locations of push portions of the flexible movable contact points 7.
    Type: Application
    Filed: December 6, 2005
    Publication date: June 22, 2006
    Applicant: Japan Aviation Electronics Industry, Limited
    Inventors: Tsuyoshi Takiguchi, Daisuke Hiraoka, Osamu Hirata, Tadanao Matsumoto, Naoki Iwao
  • Publication number: 20060129999
    Abstract: Methods and apparatus provide for: producing trace data from program status data received from at least one processor, the at least one processor being operable to execute software by addressing instructions in accordance with addresses obtained from a program counter; and storing the trace data in a trace buffer, wherein the trace data includes: (i) aggregate counts of respective program execution events; (ii) the addresses obtained from the program counter at various times; and (iii) bookmark data containing program performance information that includes neither the aggregate counts nor the addresses.
    Type: Application
    Filed: November 16, 2004
    Publication date: June 15, 2006
    Inventors: Daisuke Hiraoka, Masaki Osawa
  • Publication number: 20050273652
    Abstract: Methods and apparatus are provided for: monitoring processor tasks and associated processor loads therefor that are allocated to be performed by respective sub-processing units associated with a main processing unit; detecting whether a processing error has occurred in a given one of the sub-processing units; re-allocating all of the processor tasks of the given sub-processing unit to one or more participating sub-processing units, including other sub-processing units associated with the main processing unit, based on the processor loads of the processor tasks of the given sub-processing unit and the processor loads of the participating sub-processing units; and at least one of: (i) shutting down, and (ii) re-booting the given sub-processing unit.
    Type: Application
    Filed: May 19, 2004
    Publication date: December 8, 2005
    Applicant: Sony Computer Entertainment Inc.
    Inventors: Yasukichi Okawa, Daisuke Hiraoka, Koji Hirairi, Tatsuya Koyama
  • Publication number: 20030152111
    Abstract: A multiplexing processor multiplexes internal signals of a system LSI to be verified at a clock rate higher than that of the internal bus lines of the system LSI so as to create a multiplexed internal signal to be output. Thus, internal signals on target bus lines can be taken out of the system LSI using a small number of signal lines. Therefore, without considerably increasing the number of output terminals of the system LSI, the internal signals can be taken out through the smallest number of additional output terminals. This results in an easy verifying process for the entire operation of the system LSI without the need for a complicated design of the system LSI or an increase in cost of the system LSI.
    Type: Application
    Filed: May 24, 2002
    Publication date: August 14, 2003
    Applicant: Sony Computer Entertainment Inc.
    Inventor: Daisuke Hiraoka
  • Patent number: 6553200
    Abstract: A liquid electrophotographic developing apparatus including a developing unit and a plurality of air transport members. The developing unit has an elongated opening disposed adjacent to a moving image-bearing surface of a photoreceptor, and it is used for converting an electrostatic latent image into a toner image. Electrodes formed within the elongated opening provide an electric field to charge toner particles in a liquid developer. The air transport members are provided around the elongated opening of the developing unit, and airflow therein has a predetermined air pressure to transport unused developer away from the image-bearing surface while permitting toner particles in the liquid developer deposited on the image-bearing surface to be retained by the image-bearing surface.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: April 22, 2003
    Assignee: Aetas Technology Incorporated
    Inventors: Yuji Hiraoka, Daisuke Hiraoka
  • Publication number: 20020064398
    Abstract: The present invention discloses a liquid electrophotographic developing apparatus including a developing unit and a plurality of air transport members. The developing unit has an elongated opening disposed adjacent to a moving image-bearing surface of a photoreceptor, and it is used for converting an electrostatic latent image into a toner image. The air transport member is provided around the elongated opening of the developing unit, and airflow therein has a predetermined air pressure to transport unused liquid developer away from the image-bearing surface while permitting toner particles in the liquid developer deposited on the image-bearing surface to be retained by the image-bearing surface.
    Type: Application
    Filed: March 27, 2001
    Publication date: May 30, 2002
    Inventors: Yuji Hiraoka, Daisuke Hiraoka
  • Patent number: 5960445
    Abstract: BIOS updating is performed after saving an old BIOS to a spare storage area. A current version BIOS stored in a first bank of a flash ROM is moved to a second bank of the flash ROM, and a new BIOS supplied from a home server to a network interface card is stored in the first bank to complete BIOS updating. If the new BIOS does not run well, the old BIOS in the second bank of the flash ROM is moved to the first bank through a RAM to be reinstalled.
    Type: Grant
    Filed: April 17, 1997
    Date of Patent: September 28, 1999
    Assignee: Sony Corporation
    Inventors: Hirofumi Tamori, Daisuke Hiraoka, Koji Enoki