Patents by Inventor Daisuke Hoshikawa

Daisuke Hoshikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160070507
    Abstract: According to one embodiment, a controller writes data in a first plane among the plurality of planes, and writes management information in a second plane among the plurality of planes. The controller performs a first process of reading first data from the first plane and a second process of reading the management information from the second plane in parallel. The management information is associated with second data to be read on and after next time.
    Type: Application
    Filed: December 18, 2014
    Publication date: March 10, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Daisuke HOSHIKAWA, Takuya Haga, Shinya Takeda
  • Patent number: 8296481
    Abstract: A data transfer device includes a data buffer, an odd number flag, and a control unit. The data buffer holds an even number of data blocks from a data transfer controller. The odd number flag is set when the number of data blocks to be transferred to a receiving device is odd. The control unit transfers an even number of data blocks to the receiving device for each data transfer cycle with respect to the receiving device, and transfers one data block to the receiving device in a last transfer cycle when the odd number flag is set. Thus, also when the data transfer controller which transfers data in a unit of an even number of data blocks is used, not only an even number of data blocks but an odd number of data blocks may be transferred to the receiving device.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: October 23, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Daisuke Hoshikawa
  • Publication number: 20110307637
    Abstract: A data transfer device includes a data buffer, an odd number flag, and a control unit. The data buffer holds an even number of data blocks from a data transfer controller. The odd number flag is set when the number of data blocks to be transferred to a receiving device is odd. The control unit transfers an even number of data blocks to the receiving device for each data transfer cycle with respect to the receiving device, and transfers one data block to the receiving device in a last transfer cycle when the odd number flag is set. Thus, also when the data transfer controller which transfers data in a unit of an even number of data blocks is used, not only an even number of data blocks but an odd number of data blocks may be transferred to the receiving device.
    Type: Application
    Filed: March 15, 2011
    Publication date: December 15, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Daisuke HOSHIKAWA