Patents by Inventor Daisuke Iguchi
Daisuke Iguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200328576Abstract: A light emitting device includes a wiring substrate, a light emitting element array that includes a first side surface and a second side surface facing each other, and a third side surface and a fourth side surface connecting the first side surface and the second side surface to each other and facing each other, the light emitting element array being provided on the wiring substrate, a driving element that is provided on the wiring substrate on the first side surface side and drives the light emitting element array, a first circuit element and a second circuit element that are provided on the wiring substrate on the second side surface side to be arranged in a direction along the second side surface, and a wiring member that is provided on the third side surface side and the fourth side surface side and extends from a top electrode of the light emitting element array toward an outside of the light emitting element array.Type: ApplicationFiled: December 18, 2019Publication date: October 15, 2020Applicant: FUJI XEROX CO., LTD.Inventors: Kazuhiro SAKAI, Daisuke IGUCHI, Takeshi MINAMIRU, Yoshinori SHIRAKAWA, Tomoaki SAKITA, Tsutomu OTSUKA
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Patent number: 10789879Abstract: A light emitting device includes a board, a light emitting element that is provided on the board, a drive element that is provided on the board and drives the light emitting element, and drive wiring that is provided on the board and connects the light emitting element to the drive element, and a capacitive element that is provided inside the board such that at least a part of the capacitive element overlaps the drive wiring in plan view, and supplies a drive current to the light emitting element via internal wiring which is inside the board and faces the drive wiring.Type: GrantFiled: December 18, 2019Date of Patent: September 29, 2020Assignee: FUJI XEROX CO., LTD.Inventor: Daisuke Iguchi
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Publication number: 20200249320Abstract: Provided is a light emitting device including: a base material mounted on a wiring substrate; a light emitting element array provided on the base material; a first conductive pattern provided on the surface of the base material, the first conductive pattern including a first facing region connected to the light emitting element array, the first facing region being along a side surface of the light emitting element array and facing to the light emitting element array, and a first extending region extended beyond the first facing region; and penetrating members penetrating the base material from the first conductive pattern to a back surface side of the base material, each penetrating member being connected to the first facing region or the first extending region.Type: ApplicationFiled: July 15, 2019Publication date: August 6, 2020Applicant: FUJI XEROX CO., LTD.Inventors: Tomoaki SAKITA, Satoshi INADA, Takeshi MINAMIRU, Daisuke IGUCHI, Kazuhiro SAKAI, Yoshinori SHIRAKAWA
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Patent number: 10340243Abstract: A circuit substrate includes: a base material; and a capacitor layer. The capacitor layer includes a first metal layer that is provided on the base material, a dielectric layer that is provided on the first metal layer, and a second metal layer that is provided on the dielectric layer. The first metal layer includes a first electrode region which is provided on the base material and is exposed from the dielectric layer and to which a first terminal of a capacitor element for supplying current to a circuit part through the capacitor layer is connected. The second metal layer includes a second electrode region in which the second metal layer is exposed and to which a second terminal of the capacitor element is connected.Type: GrantFiled: June 11, 2018Date of Patent: July 2, 2019Assignees: FUJI XEROX CO., LTD., NODA SCREEN CO., LTD.Inventors: Daisuke Iguchi, Atsunori Hattori
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Publication number: 20180294240Abstract: A circuit substrate includes: a base material; and a capacitor layer. The capacitor layer includes a first metal layer that is provided on the base material, a dielectric layer that is provided on the first metal layer, and a second metal layer that is provided on the dielectric layer. The first metal layer includes a first electrode region which is provided on the base material and is exposed from the dielectric layer and to which a first terminal of a capacitor element for supplying current to a circuit part through the capacitor layer is connected. The second metal layer includes a second electrode region in which the second metal layer is exposed and to which a second terminal of the capacitor element is connected.Type: ApplicationFiled: June 11, 2018Publication date: October 11, 2018Applicants: FUJI XEROX CO., LTD., NODA SCREEN CO., LTD.Inventors: Daisuke IGUCHI, Atsunori HATTORI
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Patent number: 10020277Abstract: A circuit substrate includes: a base material; and a capacitor layer. The capacitor layer includes a first metal layer that is provided on the base material, a dielectric layer that is provided on the first metal layer, and a second metal layer that is provided on the dielectric layer. The first metal layer includes a first electrode region which is provided on the base material and is exposed from the dielectric layer and to which a first terminal of a capacitor element for supplying current to a circuit part through the capacitor layer is connected. The second metal layer includes a second electrode region in which the second metal layer is exposed and to which a second terminal of the capacitor element is connected.Type: GrantFiled: January 31, 2017Date of Patent: July 10, 2018Assignees: FUJI XEROX CO., LTD., NODA SCREEN CO., LTD.Inventors: Daisuke Iguchi, Atsunori Hattori
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Publication number: 20170221848Abstract: A circuit substrate includes: a base material; and a capacitor layer. The capacitor layer includes a first metal layer that is provided on the base material, a dielectric layer that is provided on the first metal layer, and a second metal layer that is provided on the dielectric layer. The first metal layer includes a first electrode region which is provided on the base material and is exposed from the dielectric layer and to which a first terminal of a capacitor element for supplying current to a circuit part through the capacitor layer is connected. The second metal layer includes a second electrode region in which the second metal layer is exposed and to which a second terminal of the capacitor element is connected.Type: ApplicationFiled: January 31, 2017Publication date: August 3, 2017Applicants: FUJI XEROX CO., LTD., NODA SCREEN CO., LTD.Inventors: Daisuke IGUCHI, Atsunori HATTORI
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Patent number: 9640477Abstract: A method of producing a semiconductor package includes planarizing a surface extending from at least part of connection regions to a pair of terminals by disposing a semiconductor element and a capacitor element such that the semiconductor element and the capacitor element do not overlap each other in plan view of the semiconductor element, and by filling a portion between the semiconductor element and the capacitor element with an insulator layer; directly connecting part of the connection regions and one of the pair of terminals to a first metal layer by forming the first metal layer on top of the connection regions, on top of the pair of terminals, and on top of the insulator layer; forming a dielectric layer on top of the first metal layer; and forming a capacitor layer by forming a second metal layer on top of the dielectric layer.Type: GrantFiled: August 23, 2016Date of Patent: May 2, 2017Assignee: FUJI XEROX CO., LTD.Inventor: Daisuke Iguchi
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Patent number: 8913401Abstract: A multilayer wiring board includes a signal electrode, a first power supply electrode, and a ground electrode, which are connected to a first element that outputs a signal, an electrode connected to a second element that receives the signal, a ground layer that serves as a return path for a return current of the signal, a first power supply layer that is disposed adjacent to the ground layer with a dielectric layer interposed therebetween and supplies electric power to the first element, and a second power supply layer that is provided independently of the first power supply layer and supplies electric power to the second element. The first power supply layer causes the return current to return to the first element through the first power supply electrode as a displacement current between the ground layer and the first power supply layer.Type: GrantFiled: June 20, 2013Date of Patent: December 16, 2014Assignee: Fuji Xerox Co., Ltd.Inventor: Daisuke Iguchi
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Patent number: 8829648Abstract: A semiconductor package includes a semiconductor element, a capacitor, and a package substrate. The capacitor supplies transient current to the semiconductor element. The semiconductor element and the capacitor are mounted on the package substrate. The semiconductor element includes an integrated circuit, a first connecting part, and a second connecting part. The capacitor includes a third connecting part and a fourth connecting part. The package substrate includes a first metallic layer, a second metallic layer, and a dielectric layer. The first metallic layer includes a first conductive region, a second conductive region, a third conductive region, and a fourth conductive region. The first conductive region is connected via a fifth connecting part to the second metallic layer. The third conductive region is connected via a sixth connecting part to the second metallic layer. The second and fourth conductive regions are connected to each other inside the first metallic layer.Type: GrantFiled: January 31, 2013Date of Patent: September 9, 2014Assignee: Fuji Xerox Co., Ltd.Inventor: Daisuke Iguchi
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Patent number: 8736074Abstract: According to an aspect of the invention, a semiconductor device includes a substrate having an opening area, a first semiconductor chip, and a second semiconductor chip. The first semiconductor chip has a first electrode for high-speed communication and that is disposed around the opening area on the substrate. The second semiconductor chip has a second electrode and third electrode for power and low-speed communication and that is disposed on the first semiconductor chip so that the first electrode is coupled with the second electrode by electrostatic coupling and dielectric coupling, the third electrode facing the opening area.Type: GrantFiled: November 24, 2009Date of Patent: May 27, 2014Assignee: Fuji Xerox Co., Ltd.Inventors: Daisuke Iguchi, Kanji Otsuka, Yutaka Akiyama
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Publication number: 20140133115Abstract: A multilayer wiring board includes a signal electrode, a first power supply electrode, and a ground electrode, which are connected to a first element that outputs a signal, an electrode connected to a second element that receives the signal, a ground layer that serves as a return path for a return current of the signal, a first power supply layer that is disposed adjacent to the ground layer with a dielectric layer interposed therebetween and supplies electric power to the first element, and a second power supply layer that is provided independently of the first power supply layer and supplies electric power to the second element. The first power supply layer causes the return current to return to the first element through the first power supply electrode as a displacement current between the ground layer and the first power supply layer.Type: ApplicationFiled: June 20, 2013Publication date: May 15, 2014Inventor: Daisuke IGUCHI
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Patent number: 8641146Abstract: A vehicle seat reclining apparatus comprises a base member to be connected to one of a seat cushion and a seat back, a rotation member which is to be connected to the other of the seat cushion and seat back, which is arranged to rotate relative to the base member and which includes an internal gear, a regulating member to regulate axial movement of the rotation member relative to the base member, and a locking setup which includes an external gear and which is arranged to move between a lock position to engage the external gear with the internal gear and an unlock position for disengagement. The base member includes an outer circumferential portion defining a circular recess, the rotation member includes an outer circumferential portion including a cylindrical portion fit rotatably in the outer circumferential portion of the base member.Type: GrantFiled: October 21, 2010Date of Patent: February 4, 2014Assignee: Fuji Kiko Co., Ltd.Inventors: Daisuke Suzuki, Daisuke Iguchi, Fumisato Mase
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Publication number: 20130228895Abstract: A semiconductor package includes a semiconductor element, a capacitor, and a package substrate. The capacitor supplies transient current to the semiconductor element. The semiconductor element and the capacitor are mounted on the package substrate. The semiconductor element includes an integrated circuit, a first connecting part, and a second connecting part. The capacitor includes a third connecting part and a fourth connecting part. The package substrate includes a first metallic layer, a second metallic layer, and a dielectric layer. The first metallic layer includes a first conductive region, a second conductive region, a third conductive region, and a fourth conductive region. The first conductive region is connected via a fifth connecting part to the second metallic layer. The third conductive region is connected via a sixth connecting part to the second metallic layer. The second and fourth conductive regions are connected to each other inside the first metallic layer.Type: ApplicationFiled: January 31, 2013Publication date: September 5, 2013Applicant: FUJI XEROX CO., LTD.Inventor: Daisuke IGUCHI
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Patent number: D688160Type: GrantFiled: December 21, 2011Date of Patent: August 20, 2013Assignee: Toyota Jidosha Kabushiki KaishaInventors: Shuzo Akamine, Atsushi Hirose, Daisuke Iguchi, Masahiro Ookuni
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Patent number: D774426Type: GrantFiled: March 10, 2015Date of Patent: December 20, 2016Assignee: Toyota Jidosha Kabushiki KaishaInventors: Ian Richard Cartabiano, Hideo Koyama, Daisuke Iguchi
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Patent number: D856219Type: GrantFiled: April 24, 2018Date of Patent: August 13, 2019Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hideo Koyama, Daisuke Iguchi
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Patent number: D856220Type: GrantFiled: April 24, 2018Date of Patent: August 13, 2019Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hideo Koyama, Daisuke Iguchi, Tatsuya Sonoda
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Patent number: D872652Type: GrantFiled: April 24, 2018Date of Patent: January 14, 2020Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hideo Koyama, Daisuke Iguchi, Shun Kawaguchi, Junya Furuta, Tatsuya Sonoda
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Patent number: D872661Type: GrantFiled: April 24, 2018Date of Patent: January 14, 2020Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hideo Koyama, Daisuke Iguchi, Shun Kawaguchi, Tatsuya Sonoda