Patents by Inventor Daisuke Iwahashi

Daisuke Iwahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230347921
    Abstract: A vehicle display control system according to the present disclosure includes an obstacle sensor, an environmental factor sensor, a memory, and a hardware processor coupled to the memory. The obstacle sensor detects an obstacle around a vehicle. The environmental factor sensor detects an environmental factor that changes a detection range of the obstacle sensor with respect to the obstacle. The hardware processor is configured to: control a display device that converts a detection indication region falling within the detection range of the obstacle sensor with respect to the obstacle, into a detection indication image representing the detection indication region from a viewpoint of a driver of the vehicle, and superimposes and displays the detection indication image on a scene around the vehicle; correct the detection range in accordance with the environmental factor; and update the detection indication region in accordance with the detection range that has been corrected.
    Type: Application
    Filed: February 6, 2023
    Publication date: November 2, 2023
    Inventor: Daisuke IWAHASHI
  • Patent number: 11634065
    Abstract: A control method according to the present disclosure includes: obtaining (receiving) position information (a danger warning signal) indicating a target position where a target object is present; determining whether the vehicle is driving autonomously or is being driven manually; when the vehicle is determined to be being driven manually, inspecting whether the target position is located within a predetermined region of a travel route of the vehicle based on the position information; when the target position is located within the predetermined region, changing the light transmission state of the headlight from a first state to a second state; and when the vehicle is determined to be driving autonomously and/or the target position is not located within the predetermined region, maintaining the light transmission state of the headlight.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: April 25, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takao Hasegawa, Daisuke Iwahashi, Hiroki Monta, Rumi Ohnishi
  • Publication number: 20220305981
    Abstract: A control method according to the present disclosure includes: obtaining (receiving) position information (a danger warning signal) indicating a target position where a target object is present; determining whether the vehicle is driving autonomously or is being driven manually; when the vehicle is determined to be being driven manually, inspecting whether the target position is located within a predetermined region of a travel route of the vehicle based on the position information; when the target position is located within the predetermined region, changing the light transmission state of the headlight from a first state to a second state; and when the vehicle is determined to be driving autonomously and/or the target position is not located within the predetermined region, maintaining the light transmission state of the headlight.
    Type: Application
    Filed: February 10, 2022
    Publication date: September 29, 2022
    Applicant: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Takao HASEGAWA, Daisuke IWAHASHI, Hiroki MONTA, Rumi OHNISHI
  • Patent number: 9367498
    Abstract: A resource request arbitration device is connected with each of a plurality of masters, and arbitrates transfer requests issued by the masters. The resource request arbitration device includes a plurality of counters each indicating a slack time of a transfer request issued by a master corresponding to the counter, and compares counter values stored in the counters by a tournament method, and specifies a master that has issued a transfer request having the highest priority. The resource request arbitration device grants access permission to the specified master to permit the specified master to use a slave.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: June 14, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Hiroshi Amano, Daisuke Iwahashi
  • Patent number: 9185406
    Abstract: An image decoding device for increasing decoding efficiency and reducing the number of memory accesses includes a division unit dividing a picture into first and second coded image data; and first and second decoding units decoding, in parallel, the first and second coded image data and storing decoding results into a frame storage unit. The first and second decoding units decode the first and second coded image data using second and first decoding result information, respectively, and store the resulting first and second decoding result information into an information storage unit. When decoding a target macroblock, each of the first and second decoding units performs image processing on the corresponding second or first decoding result information indicating part of the decoded macroblock included in the macroblock line adjacent to the macroblock line including the target macroblock, and the target macroblock.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: November 10, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takeshi Tanaka, Naoki Yoshimatsu, Keiichi Kurokawa, Daisuke Iwahashi
  • Patent number: 8982964
    Abstract: An image decoding device which increases decoding efficiency and can be easily implemented includes: a division unit dividing coded image data into first and second coded image data; a frame storage unit; first and second decoding units decoding, in parallel, the first and second coded image data; and an information storage unit. The first decoding unit decodes the first coded image data using second decoding result information stored in the information storage unit and stores, as first decoding result information, a part of information generated by the decoding into the information storage unit. The second decoding unit decodes the second coded image data using the first decoding result information stored in the information storage unit and stores, as the second decoding result information, a part of information generated by the decoding into the information storage unit.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: March 17, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Takeshi Tanaka, Naoki Yoshimatsu, Keiichi Kurokawa, Daisuke Iwahashi
  • Publication number: 20140006665
    Abstract: A resource request arbitration device is connected with each of a plurality of masters, and arbitrates transfer requests issued by the masters. The resource request arbitration device includes a plurality of counters each indicating a slack time of a transfer request issued by a master corresponding to the counter, and compares counter values stored in the counters by a tournament method, and specifies a master that has issued a transfer request having the highest priority. The resource request arbitration device grants access permission to the specified master to permit the specified master to use a slave.
    Type: Application
    Filed: July 27, 2012
    Publication date: January 2, 2014
    Inventors: Hiroshi Amano, Daisuke Iwahashi
  • Patent number: 8438523
    Abstract: In layout design step of the semiconductor integrated circuit manufacturing method, when it is found that the wiring length between an external terminal and an IO block (external terminal I/F circuit) corresponding to the external terminal increases after a floorplan of a circuit including a functional block and the IO block is determined, placement of the IO block is determined such that the IO block is placed close to the external terminal to alleviate constraints on the wiring between the IO block and the external terminal, and timing adjustment circuits whose number is determined according to the wiring length of a bus (or a shared bus) connecting a data transfer circuit and the IO block is inserted into the bus.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: May 7, 2013
    Assignee: Panasonic Corporation
    Inventors: Daisuke Iwahashi, Masayoshi Tojima, Tokuzo Kiyohara
  • Publication number: 20120294376
    Abstract: An image decoding device which increases decoding efficiency and can be easily implemented includes: a division unit dividing coded image data into first and second coded image data; a frame storage unit; first and second decoding units decoding, in parallel, the first and second coded image data; and an information storage unit. The first decoding unit decodes the first coded image data using second decoding result information stored in the information storage unit and stores, as first decoding result information, a part of information generated by the decoding into the information storage unit. The second decoding unit decodes the second coded image data using the first decoding result information stored in the information storage unit and stores, as the second decoding result information, a part of information generated by the decoding into the information storage unit.
    Type: Application
    Filed: September 9, 2011
    Publication date: November 22, 2012
    Inventors: Takeshi Tanaka, Naoki Yoshimatsu, Keiichi Kurokawa, Daisuke Iwahashi
  • Publication number: 20120275516
    Abstract: An image decoding device (C100) for increasing decoding efficiency and reducing the number of memory accesses includes: a division unit (C101) dividing a picture into first and second coded image data; and first and second decoding units (C103 and C104) decoding, in parallel, the first and second coded image data and storing decoding results into a frame storage unit (C102). The first and second decoding units (C103 and C104) decode the first and second coded image data using second and first decoding result information, respectively, and store the resulting first and second decoding result information into an information storage unit (C105). When decoding a target macroblock, each of the first and second decoding units performs image processing on: the corresponding second or first decoding result information indicating part of the decoded macroblock included in the macroblock line adjacent to the macroblock line including the target macroblock; and the target macroblock.
    Type: Application
    Filed: September 9, 2011
    Publication date: November 1, 2012
    Inventors: Takeshi Tanaka, Naoki Yoshimatsu, Keiichi Kurokawa, Daisuke Iwahashi
  • Publication number: 20120110535
    Abstract: In layout design step of the semiconductor integrated circuit manufacturing method, when it is found that the wiring length between an external terminal and an IO block (external terminal I/F circuit) corresponding to the external terminal increases after a floorplan of a circuit including a functional block and the IO block is determined, placement of the IO block is determined such that the IO block is placed close to the external terminal to alleviate constraints on the wiring between the IO block and the external terminal, and timing adjustment circuits whose number is determined according to the wiring length of a bus (or a shared bus) connecting a data transfer circuit and the IO block is inserted into the bus.
    Type: Application
    Filed: May 27, 2011
    Publication date: May 3, 2012
    Inventors: Daisuke Iwahashi, Masayoshi Tojima, Tokuzo Kiyohara
  • Patent number: 7962674
    Abstract: A buffer management apparatus that sequentially receives L (L>1) types of data and transmits the L types of data to an external device, including: a reception unit that receives data; M (M<L) data storage units, each including a buffer area; an interval storage unit that, for each type of data, stores reception interval information; M timing units, that each time an elapsed time from a last storing of data in a corresponding data storage unit, and a control unit that, if all of the data storage units have been allocated, in particular, to different types of data, according to a judgment result based on the elapsed times and the reception interval information, either stores the received data in at least one of the data storage units in place of previously stored data, or transmits the received data to the external device.
    Type: Grant
    Filed: November 27, 2008
    Date of Patent: June 14, 2011
    Assignee: Panasonic Corporation
    Inventors: Daisuke Iwahashi, Hideyuki Kanzaki
  • Publication number: 20100322317
    Abstract: To provide a simply-structured image decoding apparatus which appropriately executes parallel decoding processing. The image decoding apparatus includes: a stream segmentation unit (130) which generates plural segment streams by segmenting each of the pictures included in a bit stream into plural MB lines, and assigning each of the plural MB lines to a corresponding one of the plural segment streams to be generated; and plural decoding engines (120) which decode the respective plural segment streams in parallel. In the case where at least two consecutive MB lines in the bit stream have a dependency indicated by a predetermined code word, the stream segmentation unit (130) sets the code word to the segment streams so as to update the dependencies to new dependencies depending on the contexts of MB lines in the respective segment streams.
    Type: Application
    Filed: October 27, 2009
    Publication date: December 23, 2010
    Inventors: Naoki Yoshimatsu, Daisuke Iwahashi, Takeshi Tanaka
  • Publication number: 20100254620
    Abstract: To provide a simply-structured image decoding apparatus which appropriately executes parallel decoding processing. The image decoding apparatus includes: a stream segmentation unit (130) which generates four segment streams by segmenting each of the pictures included in a bit stream into plural MB lines, and assigning each of the plural MB lines to a corresponding one of the four segment streams to be generated; and four decoding engines (120) which decode the respective four segment streams in parallel. When the stream segmentation unit (130) segments a slice in the picture into slice portions and assigns the respective slice portions to plural segment streams, the stream segmentation unit (130) reconstructs, as a new slice, the slice portion group including at least one slice portion to be assigned to a corresponding one of the segment streams so that the slice portion group is recognized as a slice by the associated one of the decoding engines (120).
    Type: Application
    Filed: October 9, 2009
    Publication date: October 7, 2010
    Inventors: Daisuke Iwahashi, Naoki Yoshimatsu, Takeshi Tanaka
  • Publication number: 20100017548
    Abstract: A buffer management apparatus that sequentially receives L (L>1) types of data and transmits the L types of data to an external device, including: a reception unit that receives data; M (M<L) data storage units, each including a buffer area; an interval storage unit that, for each type of data, stores reception interval information; M timing units, that each time an elapsed time from a last storing of data in a corresponding data storage unit, and a control unit that, if all of the data storage units have been allocated, in particular, to different types of data, according to a judgment result based on the elapsed times and the reception interval information, either stores the received data in at least one of the data storage units in place of previously stored data, or transmits the received data to the external device.
    Type: Application
    Filed: November 27, 2008
    Publication date: January 21, 2010
    Inventors: Daisuke Iwahashi, Hideyuki Kanzaki