Abstract: A power control device is configured to control a power circuit that generates an output voltage based on an input supply voltage relative to a ground, and includes a first terminal fed with a common voltage, a second terminal connectable to an application terminal for the ground, a P-type substrate fed with the common voltage, a MOS transistor connected between the first and second terminals and configured with an N-channel MOSFET, and an internal reference voltage generating circuit configured to generate, based on the input supply voltage, an internal reference voltage relative to the common voltage. When the input supply voltage is turned on, the MOS transistor is turned on and thereby the first and second terminals are short-circuited together.

Abstract: A power control device is configured to control a power circuit that generates an output voltage based on an input supply voltage relative to a ground, and includes a first terminal fed with a common voltage, a second terminal connectable to an application terminal for the ground, a P-type substrate fed with the common voltage, a MOS transistor connected between the first and second terminals and configured with an N-channel MOSFET, and an internal reference voltage generating circuit configured to generate, based on the input supply voltage, an internal reference voltage relative to the common voltage. When the input supply voltage is turned on, the MOS transistor is turned on and thereby the first and second terminals are short-circuited together.

Abstract: A light-emitting element driving semiconductor integrated circuit that constitutes at least a portion of a light-emitting element driving device configured to drive a plurality of light-emitting elements connected in series includes: a controller configured to have a first mode in which switching control is performed on a transistor connected in series to the plurality of light-emitting elements and a second mode in which linear control is performed on the transistor; and a first detector configured to detect that a current flowing through a sense resistor connected in series to the plurality of light-emitting elements and the transistor reaches a threshold value, wherein the controller switches from the switching control to the linear control based on an output of the first detector.

Abstract: A light-emitting element driving semiconductor integrated circuit that constitutes at least a portion of a light-emitting element driving device configured to drive a plurality of light-emitting elements connected in series includes: a controller configured to have a first mode in which switching control is performed on a transistor connected in series to the plurality of light-emitting elements and a second mode in which linear control is performed on the transistor; and a first detector configured to detect that a current flowing through a sense resistor connected in series to the plurality of light-emitting elements and the transistor reaches a threshold value, wherein the controller switches from the switching control to the linear control based on an output of the first detector.

Abstract: The present disclosure provides a high-precision dimming circuit. A dimming circuit (107) includes an input stage (IN) and an output stage (OUT). The input stage (IN) includes a plurality of amplifiers (AMP1 to AMP3) which have non-inverted input terminals (+) thereof inputted with different dimming input voltages (DCDIM1, DCDIM2 and VH), respectively, and inverted input terminals (?) thereof inputted with a common dimming output voltage (V3). The output stage (OUT) is connected between respective output terminals of the plurality of amplifiers (AMP 1 to AMP3) and an output node of the diming output voltage (V3), and outputs, among the plurality of dimming input voltages (DCDIM1, DCDIM2 and VH) respectively inputted to the plurality of amplifiers (AMP1 to AMP3), a lowest voltage as the dimming output voltage (V3).

Abstract: The present disclosure provides a high-precision dimming circuit. A dimming circuit (107) includes an input stage (IN) and an output stage (OUT). The input stage (IN) includes a plurality of amplifiers (AMP1 to AMP3) which have non-inverted input terminals (+) thereof inputted with different dimming input voltages (DCDIM1, DCDIM2 and VH), respectively, and inverted input terminals (?) thereof inputted with a common dimming output voltage (V3). The output stage (OUT) is connected between respective output terminals of the plurality of amplifiers (AMP 1 to AMP3) and an output node of the diming output voltage (V3), and outputs, among the plurality of dimming input voltages (DCDIM1, DCDIM2 and VH) respectively inputted to the plurality of amplifiers (AMP1 to AMP3), a lowest voltage as the dimming output voltage (V3).