Patents by Inventor Daisuke Katagiri

Daisuke Katagiri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12397989
    Abstract: A control device performs selection processing for determining a selected conveyor that is to be the destination of a target article. The selection processing is processing for, if a second conveyor in which an article of the same type as the target article is the most-upstream article and there is no adjacent same-type article group, and a second conveyor in which an articles of the same type as the target article is the most-upstream article and there is an even number of articles in the adjacent same-type article group, are pairing target conveyors and there is a pairing target conveyor, determining the pairing target conveyor as the selected conveyor, and if there is no pairing target conveyor, determining a second conveyor selected according to a predetermined basic selection rule as the selected conveyor.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: August 26, 2025
    Assignee: Daifuku Co., Ltd.
    Inventors: Wataru Kiyokawa, Daisuke Katagiri
  • Patent number: 12391473
    Abstract: A supply device (4) includes a first conveyor (4A) arranged to be adjacent on a first side (Y1) in a second direction with respect to the first transfer device (30A), a second conveyor (4B) arranged to be adjacent on the first side (Y1) in the second direction with respect to a second transfer device (30B), and a third conveyor (4C) including a first connection portion (5A) connected to an end on the first side (Y1) in the second direction of the first conveyor (4A) and a second connection portion (5B) connected to an end on the first side (Y1) in the second direction of the second conveyor (4B). A plurality of articles (W) can be arranged side-by-side in a second direction (Y) on the first conveyor (4A), and a plurality of articles (W) can be arranged side by side in the second direction (Y) on the second conveyor (4B).
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: August 19, 2025
    Assignee: Daifuku Co., Ltd.
    Inventors: Wataru Kiyokawa, Daisuke Katagiri
  • Patent number: 12338825
    Abstract: A rotary machine includes a rotor having a cylindrical shape and having a main oil feed hole through which lubricating oil passes and that is provided in an axial direction and a slide bearing provided outward in a radial direction with a gap between the rotor and the slide bearing and configured to hold the rotor so that the rotor rotates around an axis. The rotor is provided with a branch oil feed hole through which the gap and the main oil feed hole communicate with each other and through which the lubricating oil passes. A foreign matter separating portion configured to separate foreign matter from the lubricating oil is provided further backward in a direction of rotation of the rotor than the branch oil feed hole.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: June 24, 2025
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yoshifumi Yamaguchi, Daisuke Katagiri, Shinichiro Ido, Hiroyuki Yamada, Nobukazu Kosone
  • Publication number: 20250101985
    Abstract: A rotary machine includes a rotor having a cylindrical shape and having a main oil feed hole through which lubricating oil passes and that is provided in an axial direction and a slide bearing provided outward in a radial direction with a gap between the rotor and the slide bearing and configured to hold the rotor so that the rotor rotates around an axis. The rotor is provided with a branch oil feed hole through which the gap and the main oil feed hole communicate with each other and through which the lubricating oil passes. A foreign matter separating portion configured to separate foreign matter from the lubricating oil is provided further backward in a direction of rotation of the rotor than the branch oil feed hole.
    Type: Application
    Filed: June 16, 2022
    Publication date: March 27, 2025
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshifumi YAMAGUCHI, Daisuke KATAGIRI, Shinichiro IDO, Hiroyuki YAMADA, Nobukazu KOSONE
  • Patent number: 12110189
    Abstract: A transfer operation control unit changes, according to an operating state index indicating a level of an operating state of a plurality of transport vehicles (1) present on a travel path, a setting of a transfer operation such that a required transfer time (Tr) from start to completion of the transfer operation is increased as the level of the operating state is reduced, while maintaining at least one setting of a traveling speed of the transport vehicles (1).
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: October 8, 2024
    Assignee: Daifuku Co., Ltd.
    Inventors: Wataru Kiyokawa, Daisuke Katagiri
  • Publication number: 20240034556
    Abstract: A supply device (4) includes a first conveyor (4A) arranged to be adjacent on a first side (Y1) in a second direction with respect to the first transfer device (30A), a second conveyor (4B) arranged to be adjacent on the first side (Y1) in the second direction with respect to a second transfer device (30B), and a third conveyor (4C) including a first connection portion (5A) connected to an end on the first side (Y1) in the second direction of the first conveyor (4A) and a second connection portion (5B) connected to an end on the first side (Y1) in the second direction of the second conveyor (4B). A plurality of articles (W) can be arranged side-by-side in a second direction (Y) on the first conveyor (4A), and a plurality of articles (W) can be arranged side by side in the second direction (Y) on the second conveyor (4B).
    Type: Application
    Filed: December 2, 2021
    Publication date: February 1, 2024
    Inventors: Wataru Kiyokawa, Daisuke Katagiri
  • Publication number: 20240034557
    Abstract: A control device performs selection processing for determining a selected conveyor that is to be the destination of a target article. The selection processing is processing for, if a second conveyor in which an article of the same type as the target article is the most-upstream article and there is no adjacent same-type article group, and a second conveyor in which an articles of the same type as the target article is the most-upstream article and there is an even number of articles in the adjacent same-type article group, are pairing target conveyors and there is a pairing target conveyor, determining the pairing target conveyor as the selected conveyor, and if there is no pairing target conveyor, determining a second conveyor selected according to a predetermined basic selection rule as the selected conveyor.
    Type: Application
    Filed: December 2, 2021
    Publication date: February 1, 2024
    Inventors: Wataru Kiyokawa, Daisuke Katagiri
  • Publication number: 20230227267
    Abstract: A transfer operation control unit changes, according to an operating state index indicating a level of an operating state of a plurality of transport vehicles (1) present on a travel path, a setting of a transfer operation such that a required transfer time (Tr) from start to completion of the transfer operation is increased as the level of the operating state is reduced, while maintaining at least one setting of a traveling speed of the transport vehicles (1).
    Type: Application
    Filed: March 3, 2021
    Publication date: July 20, 2023
    Inventors: Wataru Kiyokawa, Daisuke Katagiri
  • Publication number: 20230221337
    Abstract: The purpose of the present invention is to provide: a method for testing the aggravation risk for a person infected with the COVID-19 virus, the method allowing the use of urine as a test sample; a test kit for the method; and a companion diagnostic drug and an aggravation risk marker thereof. The present invention is a method that includes a step for determining the amount of liver fatty acid binding protein in urine sampled from a subject, and that tests the aggravation risk of SARS-CoV-2 infectious disease (COVID-19) on the basis of the quantitative determination result.
    Type: Application
    Filed: June 18, 2020
    Publication date: July 13, 2023
    Applicants: NATIONAL CENTER FOR GLOBAL HEALTH AND MEDICINE, TIMEWELL MEDICAL Co., Ltd.
    Inventors: Daisuke KATAGIRI, Eisei NOIRI, Norio OHMAGARI, Takeshi SUGAYA
  • Patent number: 11557370
    Abstract: A semiconductor device includes an external terminal, an input buffer having an input terminal connected to the external terminal, a voltage generating circuit configured to generate a test voltage supplied to the input terminal, and a control circuit configured to determine whether the input buffer is deteriorated based on the test voltage supplied to the input terminal and an output level of the input buffer responding to the test voltage.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: January 17, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Daisuke Katagiri, Terunori Kubo, Hirotsugu Nakamura
  • Publication number: 20220328123
    Abstract: A semiconductor device includes an external terminal, an input buffer having an input terminal connected to the external terminal, a voltage generating circuit configured to generate a test voltage supplied to the input terminal, and a control circuit configured to determine whether the input buffer is deteriorated based on the test voltage supplied to the input terminal and an output level of the input buffer responding to the test voltage.
    Type: Application
    Filed: April 9, 2021
    Publication date: October 13, 2022
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Daisuke KATAGIRI, Terunori KUBO, Hirotsugu NAKAMURA
  • Patent number: 10915120
    Abstract: Methods of controlling semiconductor device and semiconductor device are provided in which a semiconductor device can define a normally operational ambient temperature at a low level. The Microcontroller includes a logical block, a temperature sensor for measuring junction temperature, a power consumption circuit for consuming predetermined power, and a Controller for controlling the consumption of power by the power consumption circuit such that the temperature measured at the temperature sensor is not less than a predetermined operational lower limit temperature of the logical block 110.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: February 9, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Daisuke Katagiri
  • Publication number: 20200097032
    Abstract: Methods of controlling semiconductor device and semiconductor device are provided in which a semiconductor device can define a normally operational ambient temperature at a low level. The Microcontroller includes a logical block, a temperature sensor for measuring junction temperature, a power consumption circuit for consuming predetermined power, and a Controller for controlling the consumption of power by the power consumption circuit such that the temperature measured at the temperature sensor is not less than a predetermined operational lower limit temperature of the logical block 110.
    Type: Application
    Filed: August 21, 2019
    Publication date: March 26, 2020
    Inventor: Daisuke KATAGIRI
  • Patent number: 9889656
    Abstract: A channel substrate includes a plurality of individual channels and a plurality of linear machining marks. The plurality of individual channels is arrayed in row. The plurality of linear machining marks is substantially parallel to a direction in which the plurality of individual channels is arrayed in row.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: February 13, 2018
    Assignee: RICOH COMPANY, LTD.
    Inventors: Daisuke Katagiri, Takashi Mori
  • Publication number: 20170066237
    Abstract: A channel substrate includes a plurality of individual channels and a plurality of linear machining marks. The plurality of individual channels is arrayed in row. The plurality of linear machining marks is substantially parallel to a direction in which the plurality of individual channels is arrayed in row.
    Type: Application
    Filed: August 17, 2016
    Publication date: March 9, 2017
    Applicant: RICOH COMPANY, LTD.
    Inventors: Daisuke KATAGIRI, Takashi MORI
  • Publication number: 20120250292
    Abstract: A display panel unit 150 includes a display panel 20, a circuit board 40, a flexible board 50 and a housing 60. The display panel 20 has a terminal at a peripheral portion thereof for supply of image signal and displays an image. The circuit board 40 is disposed along a side of the display panel 20, the side having the terminal. The flexible board 50 connects the terminal of the display panel 20 and the circuit board 40 and transmits image signal from the circuit board 40 to the display panel 20. The housing 60 holds the circuit board 40 and the display panel 20. The display panel 20 is fixed to the housing 60 at a center portion of the side along which the circuit board 40 is disposed.
    Type: Application
    Filed: December 16, 2010
    Publication date: October 4, 2012
    Inventors: Atsushi Michimori, Eiji Niikura, Hiroo Sakamoto, Daisuke Katagiri, Tomoyuki Hayashi, Yoshiki Nagaoka
  • Patent number: 7109779
    Abstract: A semiconductor integrated circuit includes a first circuit and a second circuit having a breakdown voltage higher than that of the first circuit. Operation voltages of the first and second circuits can be made equal to or different from each other. The second circuit has a level shift circuit for shifting the level of an output signal of the first circuit in accordance with an operation voltage of the second circuit, an external output buffer having an input that can receive, selectively, an output signal of the level shift circuit or an input signal that bypasses the level shift circuit. When the first and second circuits operate with a low voltage, bypass is selected. In high-voltage operation and burn-in, the level shift circuit is selected.
    Type: Grant
    Filed: June 16, 2005
    Date of Patent: September 19, 2006
    Assignees: Renesas Technology Corp., Northern Japan Semiconductor Technologies, Inc.
    Inventors: Shigemitsu Tahara, Daisuke Katagiri, Takeshi Shimanuki, Masashi Oshiba
  • Publication number: 20050231262
    Abstract: A semiconductor integrated circuit includes a first circuit and a second circuit having a breakdown voltage higher than that of the first circuit. Operation voltages of the first and second circuits can be made equal to or different from each other. The second circuit has a level shift circuit for shifting the level of an output signal of the first circuit in accordance with an operation voltage of the second circuit, an external output buffer having an input that can receive, selectively, an output signal of the level shift circuit or an input signal that bypasses the level shift circuit. When the first and second circuits operate with a low voltage, bypass is selected. In high-voltage operation and burn-in, the level shift circuit is selected.
    Type: Application
    Filed: June 16, 2005
    Publication date: October 20, 2005
    Inventors: Shigemitsu Tahara, Daisuke Katagiri, Takeshi Shimanuki, Masashi Oshiba
  • Publication number: 20050206427
    Abstract: There is provided a semiconductor integrated circuit device that enables an EMS-voltage withstanding margin to be significantly enhanced without increasing a chip-layout area etc. An input buffer section, a CR filter composed of a resistor and an electrostatic capacitor device, a Schmitt circuit, and a noise cancellation circuit are connected to a system control terminal of the semiconductor integrated circuit device. When a signal containing noise is inputted to the system control terminal, a peak of the noise is reduced by an input buffer composed of the Schmitt circuit provided in the input buffer section. Thereafter, the peak of the noise is further reduced by the CR filter. Subsequently, the signal passes through the Schmitt circuit, thereby being significantly removed.
    Type: Application
    Filed: August 6, 2004
    Publication date: September 22, 2005
    Inventors: Yuichi Yuasa, Shigemitsu Tahara, Daisuke Katagiri
  • Publication number: 20040222837
    Abstract: A semiconductor integrated circuit includes a first circuit and a second circuit having a breakdown voltage higher than that of the first circuit. Operation voltages of the first and second circuits can be made equal to or different from each other. The second circuit has a level shift circuit for shifting the level of an output signal of the first circuit in accordance with an operation voltage of the second circuit, an external output buffer having an input that can receive, selectively, an output signal of the level shift circuit or an input signal that bypasses the level shift circuit. When the first and second circuits operate with a low voltage, bypass is selected. In high-voltage operation and burn-in, the level shift circuit is selected.
    Type: Application
    Filed: June 14, 2004
    Publication date: November 11, 2004
    Applicants: Renesas Technology Corp., Northern Japan Semiconductor Technologies, Inc.
    Inventors: Shigemitsu Tahara, Daisuke Katagiri, Takeshi Shimanuki, Masashi Oshiba