Patents by Inventor Daisuke KATORI

Daisuke KATORI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device
    Patent number: 11522541
    Abstract: A semiconductor device of an embodiment includes: a power supply line and a ground line; a CMOS logic gate including a P-type MOSFET network connected to the power supply line, and an N-type MOSFET network connected to a ground line side of the P-type MOSFET network; and a P-type MOSFET and an N-type MOSFET configured to activate a parasitic capacitance of the CMOS logic gate by fixing an output signal level of the CMOS logic gate.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: December 6, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Joi Okugi, Daisuke Katori, Satoru Suzuki, Satoshi Kamiya
  • Semiconductor device and control method of semiconductor device
    Patent number: 11422614
    Abstract: A semiconductor device comprises a central processing device, a first logical circuit, and a serial memory interface circuit. The first logical circuit has a first scan chain in which a first scan pattern is set, is configured to suppress a leakage current when the first scan pattern for power saving is set in the first scan chain. The serial memory interface circuit is configured to acquire the first scan pattern for power saving from an external storage device. The leakage current of the first logical circuit is suppressed by transferring the first scan pattern for power saving acquired by the serial memory interface circuit to the first logical circuit and setting the first scan pattern for power saving in the first scan chain under control of the central processing device.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: August 23, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yasuhiro Katayama, Daisuke Katori, Tatsuo Inoue, Michitomo Yamaguchi, Naoki Oshima, Shogo Masuda
  • SEMICONDUCTOR DEVICE
    Publication number: 20220085807
    Abstract: A semiconductor device of an embodiment includes: a power supply line and a ground line; a CMOS logic gate including a P-type MOSFET network connected to the power supply line, and an N-type MOSFET network connected to a ground line side of the P-type MOSFET network; and a P-type MOSFET and an N-type MOSFET configured to activate a parasitic capacitance of the CMOS logic gate by fixing an output signal level of the CMOS logic gate.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 17, 2022
    Inventors: Joi Okugi, Daisuke Katori, Satoru Suzuki, Satoshi Kamiya
  • SEMICONDUCTOR DEVICE AND CONTROL METHOD OF SEMICONDUCTOR DEVICE
    Publication number: 20210089110
    Abstract: A semiconductor device comprises a central processing device, a first logical circuit, and a serial memory interface circuit. The first logical circuit has a first scan chain in which a first scan pattern is set, is configured to suppress a leakage current when the first scan pattern for power saving is set in the first scan chain. The serial memory interface circuit is configured to acquire the first scan pattern for power saving from an external storage device. The leakage current of the first logical circuit is suppressed by transferring the first scan pattern for power saving acquired by the serial memory interface circuit to the first logical circuit and setting the first scan pattern for power saving in the first scan chain under control of the central processing device.
    Type: Application
    Filed: February 26, 2020
    Publication date: March 25, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yasuhiro KATAYAMA, Daisuke KATORI, Tatsuo INOUE, Michitomo YAMAGUCHI, Naoki OSHIMA, Shogo MASUDA