Abstract: A semiconductor memory device includes a first insulating layer, a first conductive layer, a first pillar, a second pillar, and a second insulating layer. The first conductive layer contains tungsten. The first conductive layer includes a first sub conductive layer and a second sub conductive layer. The first pillar and the second pillar pass through the first insulating layer and the first conductive layer. The second insulating layer divides the first insulating layer and the first conductive layer. The first sub conductive layer is in contact with the second sub conductive layer and is provided between the second sub conductive layer and the first insulating layer. A fluorine concentration in the first sub conductive layer is lower than that in the second sub conductive layer.

Abstract: A split ring resonator (10) as a unit cell of a passive element includes a conductor (1) made of a metal and having an annular shape split by a first gap (2) and a second gap (3) different from the first gap (2). A first capacitance generated by the first gap (2) is different from a second capacitance generated by the second gap (3).

Abstract: A split ring resonator (10) as a unit cell of a passive element includes a conductor (1) made of a metal and having an annular shape split by a first gap (2) and a second gap (3) different from the first gap (2). A first capacitance generated by the first gap (2) is different from a second capacitance generated by the second gap (3).

Abstract: A pair of access control circuits having bit line pairs wired corresponds to a same data terminal and is assigned different addresses. During a test mode, a data swap circuit prohibits swapping of connections between a pair of data terminals and a pair of data lines when one of the access control circuits is used, and swaps the connections between a pair of data terminals and a pair of data lines when the other one of the access control circuits is used. Accordingly, it is possible to give a data signal at the same logic level to bit lines with different logics from each other. Stress can be given between a contact arranged between a pair of the access control circuits and bit lines adjacent to both sides of the contact. Consequently, designing of a test pattern can be simplified, and test efficiency can be improved.

Abstract: A semiconductor memory device includes a memory cell array, a redundant element, an address specifying circuit configured to select one of a plurality of addresses as a redundancy address in response to a switchover signal, a decoder circuit configured to select the redundant element in response to an externally applied address that matches the redundancy address selected by the address specifying circuit, and a test mode setting circuit configured to change the switchover signal in response to an externally applied input, thereby to cause the redundancy address assigned to the redundant element to be switched between different ones of the plurality of addresses.

Abstract: A pair of access control circuits having bit line pairs wired corresponds to a same data terminal and is assigned different addresses. During a test mode, a data swap circuit prohibits swapping of connections between a pair of data terminals and a pair of data lines when one of the access control circuits is used, and swaps the connections between a pair of data terminals and a pair of data lines when the other one of the access control circuits is used. Accordingly, it is possible to give a data signal at the same logic level to bit lines with different logics from each other. Stress can be given between a contact arranged between a pair of the access control circuits and bit lines adjacent to both sides of the contact. Consequently, designing of a test pattern can be simplified, and test efficiency can be improved.

Abstract: A semiconductor memory device includes a memory cell array, a redundant element, an address specifying circuit configured to select one of a plurality of addresses as a redundancy address in response to a switchover signal, a decoder circuit configured to select the redundant element in response to an externally applied address that matches the redundancy address selected by the address specifying circuit, and a test mode setting circuit configured to change the switchover signal in response to an externally applied input, thereby to cause the redundancy address assigned to the redundant element to be switched between different ones of the plurality of addresses.

Abstract: Here is described a portable chiller with which an ophthalmic solution, cosmetic preparation, beverage or the like in a small container can be conveniently chilled. This portable chiller consists generally of a cylinder filled with a liquefied refrigerant gas and a chiller case. This chiller case includes a cylinderloading compartment, a cooling compartment in which the article is chilled, and a refrigerant ejection device for ejecting the refrigerant from the cylinder accommodated in the cylinder compartment into the cooling compartment.

Abstract: Here is described a portable chiller with which an ophthalmic solution, cosmetic preparation, beverage or the like in a small container can be conveniently chilled. This portable chiller consists generally of a cylinder filled with a liquefied refrigerant gas and a chiller case. This chiller case includes a cylinderloading compartment, a cooling compartment in which the article is chilled, and a refrigerant ejection device for ejecting the refrigerant from the cylinder accommodated in the cylinder compartment into the cooling compartment.