Patents by Inventor Daisuke Kosaka

Daisuke Kosaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190185676
    Abstract: A resin coated inorganic or metallic pigment includes inorganic or metallic particles (A) and an acrylic copolymer (B) formed on the inorganic or metallic particles (A) by subjecting a radically polymerizable unsaturated carboxylic acid or radically polymerizable phosphate monomer (B1) and a monomer (B2) containing 3 to 6 (meth)acryloyloxy groups per molecule to radical polymerization reaction using a polymerization initiator (C) containing a nitrile group, wherein the inorganic or metallic particles (A) are coated with a coating resin including the acrylic copolymer (B), and the acrylic copolymer (B) has at a tail thereof a structure which is derived from the polymerization initiator (C) and which is represented by the following general formula (1): wherein R1 represents a methyl group, and R2 represents an alkyl group having 2 to 5 carbon atoms, or the like.
    Type: Application
    Filed: October 31, 2016
    Publication date: June 20, 2019
    Inventors: Daisuke Nakazawa, Norio Kosaka, Kazuhiro Sugiyama, Takuya Otsubo
  • Patent number: 6677214
    Abstract: In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atom currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anisotropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diagram which is made of a single-crystalline material can be easily manufactured through no junction.
    Type: Grant
    Filed: June 12, 2000
    Date of Patent: January 13, 2004
    Assignees: Mega Chips Corporation, Crystal Device Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 6225668
    Abstract: In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atom currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anisotropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diagram which is made of a single-crystalline material can be easily manufactured through no junction.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: May 1, 2001
    Assignees: Mega Chips Corporation, Silicon Technology Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 6177706
    Abstract: In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atoms currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anistropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diagram which is made of a single-crystalline material can be easily manufactured through no junction.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: January 23, 2001
    Assignees: Mega Chips Corporation, Crystal Device Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 6137120
    Abstract: In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atom currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anisotropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diagram which is made of a single-crystalline material can be easily manufactured through no junction.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: October 24, 2000
    Assignees: Mega Chips Corporation, Crystal Device Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 6106734
    Abstract: In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atom currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anisotropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diaphragm which is made of a single-crystalline material can be easily manufactured through no junction.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: August 22, 2000
    Assignees: Mega Chips Corporation, Crystal Device Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 6025252
    Abstract: In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atom currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anisotropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diagram which is made of a single-crystalline material can be easily manufactured through no junction.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: February 15, 2000
    Assignee: Mega Chips Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 5738731
    Abstract: A solar cell comprising:a first junction part having a first conductivity type first semiconductor film and a second conductivity type second semiconductor film formed on an upper surface of said first semiconductor film; anda second junction part having a first conductivity type third semiconductor film formed on an upper surface of said second semiconductor film and a second conductivity type fourth semiconductor formed on an upper surface of said third semiconductor film,said junction parts arranged from that having a larger forbidden band width along the direction of progress of light through said semiconductor layers,said first, second, third, and fourth semiconductor films being formed of single-crystalline filming;wherein an interlayer conductor prepared from a metal forming ohmic junctions with each of said junction parts and having a thickness capable of transmitting light therethrough is interposed between said first and second junction parts; andwherein said second semiconductor film arranged on on
    Type: Grant
    Filed: August 31, 1994
    Date of Patent: April 14, 1998
    Assignees: Mega Chips Corporation, Crystal Device Corporation
    Inventors: Masahiro Shindo, Daisuke Kosaka, Tetsuo Hikawa, Akira Takata, Yukihiro Ukai, Takashi Sawada, Toshifumi Asakawa
  • Patent number: 5565697
    Abstract: A semiconductor substrate comprises a foundation, a semiconductor monocrystalline film formed on the foundation, and a high-melting-point metal film or a high-melting-point metal alloy film disposed in at least part of a region between the semiconductor monocrystalline film and the foundation. The high-melting-point metal film disposed below the semiconductor monocrystalline film can be utilized as a conductor in a semiconductor device.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: October 15, 1996
    Assignee: Ricoh Company, Ltd.
    Inventors: Toshifumi Asakawa, Daisuke Kosaka, Haruo Nakayama
  • Patent number: 5459346
    Abstract: A semiconductor substrate comprises a foundation, a semiconductor monocrystalline film formed on the foundation, and a high-melting-point metal film or a high-melting-point metal alloy film disposed in at least part of a region between the semiconductor monocrystalline film and the foundation. The high-melting-point metal film disposed below the semiconductor monocrystalline film can be utilized as a conductor in a semiconductor device.
    Type: Grant
    Filed: November 17, 1994
    Date of Patent: October 17, 1995
    Assignee: Ricoh Co., Ltd.
    Inventors: Toshifumi Asakawa, Daisuke Kosaka, Haruo Nakayama
  • Patent number: 5173446
    Abstract: A semiconductor substrate comprises a foundation, a semiconductor monocrystalline film formed on the foundation, and a high-melting-point metal film or a high-melting-point metal alloy film disposed in at least part of a region between the semiconductor monocrystalline film and the foundation. The high-melting-point metal film disposed below the semiconductor monocrystalline film can be utilized as a conductor in a semiconductor device.
    Type: Grant
    Filed: June 13, 1991
    Date of Patent: December 22, 1992
    Assignee: Ricoh Company, Ltd.
    Inventors: Toshifumi Asakawa, Daisuke Kosaka, Haruo Nakayama
  • Patent number: 5077235
    Abstract: A method of manufacturing a semiconductor integrated circuit device having a SOI structure includes the following steps. The first step is to form a semiconductor layer on a dielectric substrate. The second step is to form an oxide layer on the formed semiconductor layer. The third step is to form a nitride layer on the formed oxide layer. The fourth step is to remove a part of a plurality of layers composed of the semiconductor layer, the oxide layer, and a nitride layer so as to form a separated region in the layers. The fifth step is to coat a cooling agent on a surface of the nitride layer. The sixth step is to irradiate an energy beam from an outer surface of the cooling agent so as to monocrystallize the semiconductor layer. The seventh step is to remove the cooling agent from the surface of the nitride layer. And the final step is to oxidize a portion of the semiconductor layer located in the separated region by using the nitride layer.
    Type: Grant
    Filed: January 16, 1990
    Date of Patent: December 31, 1991
    Assignee: Ricoh Comany, Ltd.
    Inventor: Daisuke Kosaka
  • Patent number: 5073815
    Abstract: A semiconductor substrate that comprises: a base plate member made from a dielectric material; a refractory metal film covering at least a part of the base plate member; a single crystal semiconductor film formed on the refractory metal film; and an impurities-diffusion layer formed in said single crystal semiconductor film in a side contacting with the refractory metla film. The diffusion layer has a density grade gradually decreasing toward a direction away from the refractory metal film so that this impurities-diffusion layer comes in ohmic contact with the refractory metal film.
    Type: Grant
    Filed: August 21, 1990
    Date of Patent: December 17, 1991
    Assignee: Ricoh Company, Ltd.
    Inventors: Daisuke Kosaka, Junichi Konishi
  • Patent number: 5041847
    Abstract: A thermal head comprising a substrate, a heat-resistant dielectric resin layer disposed on the substrate, a resistor layer disposed on the resin layer for forming a plurality of heating elements and an electrode layer disposed on the resistor layer for forming electrodes connecting to the heating elements. A protection film covers an end of the substrate and each end of the layers which is substantially in the same plane as the substrate end.
    Type: Grant
    Filed: August 21, 1990
    Date of Patent: August 20, 1991
    Assignee: Ricoh Company, Ltd.
    Inventors: Shoji Matsumoto, Daisuke Kosaka, Masaaki Yoshida, Hidehito Kitakado, Kenji Fujita
  • Patent number: 5031019
    Abstract: A method for manufacturing a Bi-CMOS device by preparing both of bipolar and MOS standard cells in a library is provided. A substrate of a first conductivity type is provided and a plurality of buried layers of a second conductivity type are formed on selected locations of the substrate. Then an epitaxial layer of the first conductivity type is formed on the substrate covering the buried layers. Then a plurality of wells of the second conductivity type are formed in the epitaxial layer such that each of the wells extends through the epitaxial layer from the top surface to at least a portion of the corresponding buried layer to thereby define a plurality of electrically isolated islands in the epitaxial layer. Then a bipolar transistor is formed in at least one of the islands with a MOS transistor formed in at least another of the islands.
    Type: Grant
    Filed: May 27, 1988
    Date of Patent: July 9, 1991
    Assignee: Ricoh Company, Ltd.
    Inventors: Daisuke Kosaka, Yoshinori Ueda, Tetsuo Hikawa, Masami Nishikawa
  • Patent number: 5012448
    Abstract: A multilevel sense circuit includes a memory MOSFET having one of at least two different current carrying states and a pair of reference MOSFETs one of which has one of the two current carrying states and the other of which has the other current carrying state. A first current supplying circuit is connected to the memory MOSFET for supplying a predetermined amount of current thereto when the memory MOSFET is activated. A second current supplying circuit is connected to the pair of reference MOSFETs and also to the first current supplying circuit, such that twice the aforementioned predetermined amount of current is supplied to the pair of reference MOSFETs when the memory MOSFET is activated. A multilevel semiconductor memory device includes a MOSFET having a channel whose width is varyingly set by providing a non-inverting region in a selected area of the channel by ion implantation.
    Type: Grant
    Filed: July 15, 1988
    Date of Patent: April 30, 1991
    Assignee: Ricoh Company, Ltd.
    Inventors: Shigeki Matsuoka, Hiizu Okubo, Daisuke Kosaka
  • Patent number: 4992393
    Abstract: A method for producing a semiconductor thin film by melt and recrystallization process. At least one recess is formed in a stacked layered structure including a semiconductor thin film layer. The recess has an arrow head shape seen from a surface side of the layered structure. The apex of the arrow head shape is oriented to a forward direction on a scanning line. The surface of the layered structure is covered with a cooling medium so that the recess is filled with the cooling medium. An energy beam is irradiated to the layered structure through the cooling medium to scan the structure along the scanning line so as to melt the semiconductor thin film and after that the semiconductor is cooled and recrystallized to form a single crystal structure therein.
    Type: Grant
    Filed: May 25, 1990
    Date of Patent: February 12, 1991
    Assignee: Ricoh Company, Ltd.
    Inventors: Daisuke Kosaka, Junichi Konishi
  • Patent number: 4884051
    Abstract: A semiconductor diffusion type force sensing apparatus includes a plate-like semiconductor substrate formed by a single crystal material, and a plurality of sensing elements each constituted by a substantially rectangular impurity-diffused region formed in the semiconductor substrate. The sensing elements have an electric resistance variable in accordance with a deformation thereof due to an external force exerted on the semiconductor substrate. The sensing elements are arranged in a direction in which a longitudinal direction of each of the sensing elements coincides with a crystal orientation of the semiconductor substrate having an external value of a longitudinal piezoresistance coefficient of the impurity-diffused region.
    Type: Grant
    Filed: July 5, 1988
    Date of Patent: November 28, 1989
    Assignee: Ricoh Company, Ltd.
    Inventors: Junichi Takahashi, Daisuke Kosaka, Hirotoshi Eguchi, Shoji Matsumoto, Takashi Akahori, Hiroshi Yamazaki, Kouji Izumi