Patents by Inventor Daisuke Yoshida

Daisuke Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12294798
    Abstract: A photoelectric conversion device includes a pixel array and a reading unit including a plurality of reading circuits each configured to read a signal from the pixel array. Each reading circuit includes a sample-and-hold unit including a first sample-and-hold circuit configured to hold a reset level output from the pixel array and a second sample-and-hold circuit configured to hold a photo signal level output from the pixel array. The plurality of reading circuits include first reading circuits forming a first group and second reading circuits forming a second group. At least some of the plurality of first reading circuits are controlled by a first control signal given via a first control line, and at least some of the plurality of second reading circuits are controlled by a second control signal given via a second control line.
    Type: Grant
    Filed: January 8, 2024
    Date of Patent: May 6, 2025
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideo Kobayashi, Daisuke Yoshida
  • Patent number: 12267613
    Abstract: Provided is a signal processing device including a first substrate, a signal generation circuit arranged in the first substrate and configured to generate a reference signal to be used for comparison with a signal output from a pixel, a circuit element arranged in the first substrate and different from the signal generation circuit, and a contact region in which a contact connecting the first substrate and a wiring layer arranged over the first substrate is arranged. In a plan view with respect to the first substrate, the contact region is arranged between the signal generation circuit and the circuit element.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: April 1, 2025
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hideo Kobayashi, Daisuke Yoshida, So Hasegawa, Yu Katase, Hajime Hayami
  • Patent number: 12244948
    Abstract: Pixels output a first signal based on signal charge of a part of photoelectric conversion units of multiple photoelectric conversion units, and a second signal based on signal charge of multiple photoelectric conversion units. An imaging apparatus outputs signals based on the first signals and signals based on the second signals by reducing the number of signals based on the first signals as compared to the number of signals based on the second signals.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: March 4, 2025
    Assignee: Canon Kabushiki Kaisha
    Inventors: Seiji Hashimoto, Atsushi Furubayashi, Takeru Suzuki, Kazuhiro Sonoda, Daisuke Yoshida, Hirofumi Totsuka, Takashi Muto, Yasushi Matsuno
  • Patent number: 12220907
    Abstract: A printing apparatus includes: a user-setting-value acquiring unit configured to acquire a user setting value indicating a remaining amount of paper on a paper roll, the user setting value being set by a user; a first detection unit configured to detect that a physical quantity correlated with a remaining amount of paper on the paper roll has become equal to a first threshold value; a second detection unit configured to detect that the remaining amount of paper on the paper roll has become equal to a second threshold value; a post-detection length acquiring unit configured to acquire a post-detection length being a length of paper used from the paper roll from a time when it is detected that the physical quantity has become equal to the first threshold value until the remaining amount of paper on the paper roll becomes equal to the second threshold value; and a notification unit configured to notify that, when a new paper roll is used and a length of paper used from the new paper roll from a time when it is d
    Type: Grant
    Filed: March 21, 2023
    Date of Patent: February 11, 2025
    Assignee: SEIKO INSTRUMENTS INC.
    Inventors: Daisuke Yoshida, Yuichi Yoshigi, Hiroaki Kondo, Yoshio Kitamura, Koichi Hatakeyama, Koki Yoshida, Ryota Naka
  • Publication number: 20250037934
    Abstract: In an element body of a multilayer capacitor C1, a plurality of dielectric layers and a plurality of internal electrode layers extend in a first and second direction orthogonal to each other, and the plurality of dielectric layers and the plurality of internal electrode layers are alternately laminated in a third direction intersecting the first direction and second direction. The element body includes at least one end surface. At least one internal electrode layer among the plurality of internal electrode layers is exposed from the plurality of dielectric layers at at least one end surface. The external electrode terminal is provided on the at least one end surface and is connected to the at least one internal electrode layer. In the element body, a weight ratio of a metal containing Ni is from 20% to 25%, and a weight ratio of sulfur is from 3 ppm to 20 ppm.
    Type: Application
    Filed: July 3, 2024
    Publication date: January 30, 2025
    Applicant: TDK Corporation
    Inventors: Hikaru HIRABAYASHI, Daisuke HIMETA, Daisuke YOSHIDA, Yuya NAGASAKI
  • Patent number: 12203775
    Abstract: The disclosed apparatus includes a plurality of differential transmitters, and a power supply circuit that supplies a power supply voltage to each of the plurality of differential transmitters. The power supply circuit includes a common circuit unit that defines the power supply voltage supplied to the plurality of differential transmitters, and a plurality of individual circuit units provided in association with the plurality of differential transmitters and each connected to the common circuit unit. Each of the plurality of individual circuit units has an output node that outputs the power supply voltage defined by the common circuit unit to a corresponding differential transmitter of the plurality of differential transmitters, and respective output nodes of the plurality of individual circuit units are connected to each other.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: January 21, 2025
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Masaki Sato, Daisuke Kobayashi, Tetsuya Itano, Daisuke Yoshida
  • Publication number: 20250014378
    Abstract: A document processing system includes a storage device, and a control device. The storage device contains a document processing program. The control device includes a processor, and executes, when the processor executes the document processing program, an operation including extracting, through OCR, a plurality of values from a document having a form of electronic data, containing the plurality of values with respect to a specific item, reproducing a same number of the documents as a number of pieces of the values extracted, and assigning a file name including the value, to each of the values, as the file name of each of the documents generated through the reproduction.
    Type: Application
    Filed: July 2, 2024
    Publication date: January 9, 2025
    Applicant: KYOCERA Document Solutions Inc.
    Inventor: Daisuke YOSHIDA
  • Patent number: 12159755
    Abstract: A multilayer capacitor includes an element body haying a pair of end surfaces, and a pair of side surfaces and a pair of main surfaces; and a pair of external electrodes. The element body includes an inner layer portion in which a plurality of internal electrodes and a plurality of dielectric layers are alternately stacked in a second direction where the pair of main surfaces face each other, and a pair of outer layer portions disposed outside the inner layer portion in the second direction. On at least one of the pair of end surfaces, the internal electrode of the inner layer portion protrudes outward in the first direction from the outer layer portion by a predetermined protrusion amount. A ratio of the protrusion amount to a dimension of one outer layer portion in the second direction ranges from 96,000 ppm to 176,000 ppm.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: December 3, 2024
    Assignee: TDK CORPORATION
    Inventors: Hikaru Hirabayashi, Daisuke Yoshida, Masato Kimura
  • Patent number: 12087053
    Abstract: A work supporting apparatus includes: a visible light camera (visible light image photographing unit) configured to photograph a visible light image; a far-infrared camera (thermal image photographing unit) configured to photograph a thermal image; a work progress status determining unit configured to determine a work progress status from the visible light image photographed by the visible light camera and the thermal image photographed by the far-infrared camera; and a display configured to display a determination result of the work progress status.
    Type: Grant
    Filed: April 19, 2023
    Date of Patent: September 10, 2024
    Assignee: MAXELL, LTD.
    Inventors: Daisuke Yoshida, Hiroaki Ito
  • Publication number: 20240250105
    Abstract: A semiconductor apparatus according to the present invention includes: a semiconductor component including a cell array and a plurality of wirings; and a semiconductor component including a plurality of pads connected to the semiconductor component including the cell array. A first row pad connected to a row wiring connected to a first cell and a second cell, a second row pad connected to a row wiring connected to a third cell and a fourth cell, and a column pad connected to a column wiring connected to the first cell and the third cell are arranged such that a straight line connecting the first row pad and the column pad crosses a straight line connecting the second row pad and the column pad.
    Type: Application
    Filed: April 3, 2024
    Publication date: July 25, 2024
    Inventors: Kohei Matsumoto, Hideo Kobayashi, Daisuke Yoshida
  • Patent number: 12045115
    Abstract: An electronic apparatus is capable of reducing the startup time period of a device requiring initialization while suppressing power consumption of a battery. The electronic apparatus includes a main controller, a sub controller, a battery, a power reception controller configured to extract electric power from radio waves, and a power supply controller configured to control supply of electric power from the battery or the power reception controller to the sub controller. The main controller controls supply of electric power to the power supply controller such that electric power is supplied from the battery in a power-on mode in which power consumption of the electronic apparatus is large, and switches the power supply source to the power reception controller when the electronic apparatus shifts to a power-off mode in which the power consumption is smaller than in the power-on mode.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: July 23, 2024
    Assignee: Canon Kabushiki Kaisha
    Inventor: Daisuke Yoshida
  • Publication number: 20240230326
    Abstract: The disclosed apparatus includes a plurality of differential transmitters, and a power supply circuit that supplies a power supply voltage to each of the plurality of differential transmitters. The power supply circuit includes a common circuit unit that defines the power supply voltage supplied to the plurality of differential transmitters, and a plurality of individual circuit units provided in association with the plurality of differential transmitters and each connected to the common circuit unit. Each of the plurality of individual circuit units has an output node that outputs the power supply voltage defined by the common circuit unit to a corresponding differential transmitter of the plurality of differential transmitters, and respective output nodes of the plurality of individual circuit units are connected to each other.
    Type: Application
    Filed: October 29, 2020
    Publication date: July 11, 2024
    Inventors: Kohichi Nakamura, Masaki Sato, Daisuke Kobayashi, Tetsuya Itano, Daisuke Yoshida
  • Patent number: 11984920
    Abstract: A radio-frequency module includes an integrated circuit (IC) device and an external inductor provided outside the IC device. The IC device includes a plurality of low-noise amplifiers, one or more inductors, and a switching circuit. The plurality of low-noise amplifiers includes a plurality of transistors in one to one correspondence. The one or more inductors are coupled to one or more of the plurality of transistors. Each inductor is coupled to the emitter or source of a corresponding one of the plurality of transistors. The switching circuit is coupled between the emitter or source of each of the plurality of transistors and the external inductor. The external inductor is coupled between the switching circuit and ground in series with each of the one or more inductors via the switching circuit.
    Type: Grant
    Filed: March 7, 2023
    Date of Patent: May 14, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Daisuke Yoshida
  • Patent number: 11978755
    Abstract: A semiconductor apparatus according to the present invention includes: a semiconductor component including a cell array and a plurality of wirings; and a semiconductor component including a plurality of pads connected to the semiconductor component including the cell array. A first row pad connected to a row wiring connected to a first cell and a second cell, a second row pad connected to a row wiring connected to a third cell and a fourth cell, and a column pad connected to a column wiring connected to the first cell and the third cell are arranged such that a straight line connecting the first row pad and the column pad crosses a straight line connecting the second row pad and the column pad.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: May 7, 2024
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohei Matsumoto, Hideo Kobayashi, Daisuke Yoshida
  • Publication number: 20240147096
    Abstract: A photoelectric conversion device includes a pixel array and a reading unit including a plurality of reading circuits each configured to read a signal from the pixel array. Each reading circuit includes a sample-and-hold unit including a first sample-and-hold circuit configured to hold a reset level output from the pixel array and a second sample-and-hold circuit configured to hold a photo signal level output from the pixel array. The plurality of reading circuits include first reading circuits forming a first group and second reading circuits forming a second group. At least some of the plurality of first reading circuits are controlled by a first control signal given via a first control line, and at least some of the plurality of second reading circuits are controlled by a second control signal given via a second control line.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Inventors: Hideo Kobayashi, Daisuke Yoshida
  • Publication number: 20240133686
    Abstract: The disclosed apparatus includes a plurality of differential transmitters, and a power supply circuit that supplies a power supply voltage to each of the plurality of differential transmitters. The power supply circuit includes a common circuit unit that defines the power supply voltage supplied to the plurality of differential transmitters, and a plurality of individual circuit units provided in association with the plurality of differential transmitters and each connected to the common circuit unit. Each of the plurality of individual circuit units has an output node that outputs the power supply voltage defined by the common circuit unit to a corresponding differential transmitter of the plurality of differential transmitters, and respective output nodes of the plurality of individual circuit units are connected to each other.
    Type: Application
    Filed: October 28, 2020
    Publication date: April 25, 2024
    Inventors: Kohichi Nakamura, Masaki Sato, Daisuke Kobayashi, Tetsuya Itano, Daisuke Yoshida
  • Publication number: 20240120152
    Abstract: An electronic device includes an element body. The element body includes at least two internal electrode layers and a dielectric layer laminated between the internal electrode layers. Ni oxide particles exist at a boundary between the internal electrode layers and the dielectric layer. The dielectric layer is in contact with the internal electrode layers at first and second boundaries. The dielectric layer includes a first dielectric large particle and a second dielectric large particle. The first dielectric large particle is in contact with at least one of the Ni oxide particles existing at the first boundary and in contact with one of the internal electrode layers at the second boundary. The second dielectric large particle is in contact with at least one of the internal electrode layers at the first boundary and in contact with at least one of the Ni oxide particles existing at the second boundary.
    Type: Application
    Filed: September 11, 2023
    Publication date: April 11, 2024
    Applicant: TDK CORPORATION
    Inventors: Toshihiro IGUCHI, Daisuke YOSHIDA
  • Publication number: 20240112865
    Abstract: An electronic device includes an element body. The element body includes a first internal electrode layer, a second internal electrode layer, and a dielectric layer laminated between the first internal electrode layer and the second internal electrode layer. Ni oxide particles exist at a first boundary between the first internal electrode layer and the dielectric layer. The dielectric layer includes a dielectric large particle in contact with both of the Ni oxide particles at the first boundary and the second internal electrode layer.
    Type: Application
    Filed: September 11, 2023
    Publication date: April 4, 2024
    Applicant: TDK CORPORATION
    Inventors: Toshihiro IGUCHI, Daisuke YOSHIDA, Kazunori OSHIMA
  • Patent number: 11910116
    Abstract: A photoelectric conversion device includes a pixel array and a reading unit including a plurality of reading circuits each configured to read a signal from the pixel array. Each reading circuit includes a sample-and-hold unit including a first sample-and-hold circuit configured to hold a reset level output from the pixel array and a second sample-and-hold circuit configured to hold a photo signal level output from the pixel array. The plurality of reading circuits include first reading circuits forming a first group and second reading circuits forming a second group. At least some of the plurality of first reading circuits are controlled by a first control signal given via a first control line, and at least some of the plurality of second reading circuits are controlled by a second control signal given via a second control line.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: February 20, 2024
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideo Kobayashi, Daisuke Yoshida
  • Publication number: 20240008785
    Abstract: An information processing device connected to a terminal device of a subject and which visualizes emotion of the subject includes a data managing section that acquires at least data related to voice, a facial expression image, and a pulse wave of the subject; an emotion expression engine section which calculates a brain fatigue level based on a frequency of the voice, which calculates a mood level by extracting an emotion of the subject from the facial expression image, and which calculates a stress level by performing a frequency analysis of the pulse wave by fast Fourier transform and extracting a high-frequency section and a low-frequency section; and a three-axes processing section which displays a graph of points plotted at coordinates corresponding to the brain fatigue level, the mood level, and the stress level in a three-dimensional space defined by an X-axis, a Y-axis, and a Z-axis.
    Type: Application
    Filed: February 14, 2022
    Publication date: January 11, 2024
    Inventors: Michio Yokoyama, Tomochika Harada, Daisuke Yoshida, Makoto Shohara, Kenichi Suzuki, Shigeyuki Seko