Patents by Inventor Daivd J. Petrick

Daivd J. Petrick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110107158
    Abstract: A processing system including an FPGA having a dual port RAM and for use in hostile environments. The FPGA includes three portions: a C&DH portion; a first scratch pad portion receiving a first set of data, processing the first set of data, and outputting a first set of processed data to a first location of the RAM; and a second scratch pad portion receiving a second set of data identical to the first set of data, processing the second set of data in the same way that the first set of data is processed, and outputting a second set of processed data to a second location of the RAM. The C&DH portion compares the first set of processed data to the second set of processed data and, if the first set of processed data is the same as the second set of processed data, outputs one set of processed data.
    Type: Application
    Filed: August 11, 2010
    Publication date: May 5, 2011
    Inventors: Daniel C. Espinosa, Alessandro Geist, Daivd J. Petrick, Thomas P. Flatley, Jeffrey C. Hosler, Gary A. Crum, Manuel Buenfil