Patents by Inventor Dale A. Gee

Dale A. Gee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6577427
    Abstract: A method for fabricating a mirror array from multilayered substrate structures. The method forms a release layer overlying a material layer, which is formed on an insulating layer of multilayered substrate. The insulating layer is sandwiched between the material layer and a handle layer. As merely an example, the material layer is a silicon layer defined over a silicon dioxide layer on a silicon on insulator structure, commonly known as SOI. The method forms an opening in the release layer to expose a portion of the material layer. The method forms a torsion bar layer overlying the release layer and in the opening to connect to the material layer; and removes the release layer to hang the material layer from the torsion bar layer.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: June 10, 2003
    Assignee: Nayna Networks, Inc.
    Inventors: Dale A. Gee, Abhijeet D. Sathe
  • Patent number: 6527965
    Abstract: A method for fabricating an array of mirrors disposed on a die from a substrate. The method includes placing a substrate comprising a plurality of die thereon on a stage. Each of the die comprises a plurality of movable mirror devices in an array configuration. Each die comprises a peripheral region defining a street that surrounds the array configuration. The method forms a plurality of tabs that join one die to another die in the street of the substrate. Each of the tabs also is separated from each other in a sequential manner by a recessed region between at least two of the tabs. The street defined by the tabs and the recessed region defined therebetween in a sequential manner.
    Type: Grant
    Filed: February 9, 2001
    Date of Patent: March 4, 2003
    Assignee: Nayna Networks, Inc.
    Inventors: Dale A. Gee, Xiao Yang, Abhijeet D. Sathe
  • Patent number: 6525864
    Abstract: An integrated circuit and mirror device. The device includes a first substrate comprising a plurality of electrode groups, wherein each of the groups comprises a plurality of electrodes. A mirror array is formed on a second substrate. Each of the mirrors on the array has a mirror surface being able to pivot about a point (e.g., fixed point, region) in space. Each of the mirrors has a backside surface operably coupled to one of the electrode groups. A bonding layer mechanically couples the first substrate to the second substrate, whereupon the backside surface of each mirror faces one of the electrode groups. The device also has a drive circuitry coupled to each electrode groups. The drive circuitry is configured to apply a voltage to any one of the electrodes in each of the electrode groups. The drive circuitry is disposed in the first substrate and being adapted to pivot each of the mirror faces about the point in space.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: February 25, 2003
    Assignee: Nayna Networks, Inc.
    Inventors: Dale A. Gee, Xiao Yang, Anup K. Nayak
  • Patent number: 6456753
    Abstract: An apparatus for switching one of a plurality of optical signals from a plurality of optical fibers. The apparatus has an input fiber bundle housing comprising an outer side and an inner side. The input fiber bundle housing has a plurality of sites oriented in a spatial manner on the outer side for coupling to a plurality of input optical fibers. Each of the input optical fibers is capable of transmitting an optical signal. The apparatus also has a first mirror array disposed facing the inner side of the input fiber bundle housing. The first mirror array includes a plurality of mirrors. Each of the mirrors corresponds to one of the sites on the outer side of the input fiber bundle housing. A second mirror array is disposed facing the first mirror array. The second mirror array is also disposed around a periphery of the input fiber bundle.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: September 24, 2002
    Assignee: Nayna Networks
    Inventors: Dale A. Gee, Madhav Y. Reddy, Sascha Hallstein, Dilip K. Paul, Vipul D. Badoni, David M. Hong
  • Publication number: 20020131146
    Abstract: An integrated circuit and mirror device. The device includes a first substrate comprising a plurality of electrode groups, wherein each of the groups comprises a plurality of electrodes. A mirror array is formed on a second substrate. Each of the mirrors on the array has a mirror surface being able to pivot about a point (e.g., fixed point, region) in space. Each of the mirrors has a backside surface operably coupled to one of the electrode groups. A bonding layer mechanically couples the first substrate to the second substrate, whereupon the backside surface of each mirror faces one of the electrode groups. The device also has a drive circuitry coupled to each electrode groups. The drive circuitry is configured to apply a voltage to any one of the electrodes in each of the electrode groups. The drive circuitry is disposed in the first substrate and being adapted to pivot each of the mirror faces about the point in space.
    Type: Application
    Filed: January 25, 2002
    Publication date: September 19, 2002
    Applicant: Nayna Networks, Inc. (a Delaware corporation)
    Inventors: Dale A. Gee, Xiao Yang, Anup Nayak
  • Publication number: 20020110312
    Abstract: An integrated circuit and mirror device and method. The device has a first substrate comprising a plurality of electrode groups, which comprise a plurality of electrodes. The device also has a mirror array formed on a second substrate. Each of the mirrors on the array has a mirror surface being able to pivot about a point in space. Each of the mirrors has a backside surface operably coupled to one of the electrode groups. The device has a capacitance spacer layer disposed between each of the electrode groups and its respective mirror. The mirror is one from the mirror array. A drive circuitry is coupled to each electrode groups. The drive circuitry is configured to apply a drive voltage to any one of the electrodes in each of the electrode groups. The drive circuitry is also disposed in the first substrate and is adapted to pivot each of the mirror faces about the point in space.
    Type: Application
    Filed: January 25, 2001
    Publication date: August 15, 2002
    Applicant: Nayna Networks, Inc.
    Inventors: Xiao Yang, Dale A. Gee, Anup K. Nayak
  • Patent number: 6429033
    Abstract: A method for fabricating a mirror array from a silicon on insulator substrate structure. The method includes providing a silicon-on-insulator (SOI) substrate structure, which may have a material thickness of greater than 10 microns overlying an insulating layer. The SOI material thickness is of a single crystal silicon bearing material. The method also patterns the material thickness using a deep reactive ion etching process to pattern a mirror device structure by forming a trench region that extends from a surface of the material thickness to the insulator structure; and patterns the thickness of material to form a recessed region coupled to the trench region to define a torsion bar structure. The recessed region extends from the surface of the material thickness and is less than about 80% of the mirror device thickness. The method forms an opening on a back side of the SOI substrate structure to the insulator structure.
    Type: Grant
    Filed: May 24, 2001
    Date of Patent: August 6, 2002
    Assignee: Nayna Networks, Inc.
    Inventors: Dale A. Gee, Abhijeet D. Sathe
  • Patent number: 6407844
    Abstract: An optical deflection device. The device includes a substrate (e.g., silicon, silicon on insulator) comprising a plurality of die thereon. Each of the die has a plurality of movable mirror devices in an array configuration. Each of the movable mirrors is supported by at least one torsion bar to a frame structure, which is formed on the substrate. Each of the die also has a peripheral region defining a street that surrounds the array configuration to define the die. A plurality of tabs is formed in the street to join one die to another die on the substrate. At least two of the tabs are separated from each other in a sequential manner by a recessed region defined there between. The tabs and the recessed region are positioned to each other in a sequential manner.
    Type: Grant
    Filed: February 9, 2001
    Date of Patent: June 18, 2002
    Assignee: Nayna Networks, Inc.
    Inventors: Xiao Yang, Dale A. Gee, Abhijeet D. Sathe