Abstract: A fire pit includes a top plate, upright poles, side plates, and limiting members. The top plate has a central through hole and connecting parts on its lower surface. An upper end face of each upright pole is rotably connected to a corresponding one of the connecting parts in a snap-on manner. Each upright pole has mounting grooves its sides. The mounting grooves extend downwardly along an axial direction of the upright pole and pass a lower end face of the upright pole. Two ends of each side plate are insertedly connected to the mounting grooves of corresponding two of the upright poles from lower ends of the corresponding upright poles. The limiting members are movably connected to lower end portions of the sides of the respective upright poles for limiting and preventing the side plates from falling out of the mounting grooves of the upright poles.

Abstract: An informatics platform comprising method, system, and computer program is provided for interacting with clinical decision support systems such as the IBM Watson for Oncology, for the purpose of utilizing cognitive processing, machine learning and natural language processing to facilitate the manual to semi-automatic to automatic acquisition of a patient's electronic medical record data points, into a CDS system for populating the attributes questionnaire, for generating a patient diagnostic report of treatment recommendations. The platform supports deployment on several informatics architectures including client-server, cloud-based and blockchain.

Abstract: Wireless devices are provisioned to join a wireless mesh network by writing an individual or common join key and network identification information to the wireless device, and creating an association of the wireless device with a gateway of the network by providing the gateway with a unique device identifier for the wireless device. The writing of the join key to the wireless device is achieved without revealing the join key to a user.

Abstract: Wireless devices are provisioned to join a wireless mesh network by writing an individual or common join key and network identification information to the wireless device, and creating an association of the wireless device with a gateway of the network by providing the gateway with a unique device identifier for the wireless device. The writing of the join key to the wireless device is achieved without revealing the join key to a user.

Abstract: A birdbath is disclosed that recirculates water and includes a substantially hollow pedestal that supports a basin. The pedestal forms a water reservoir therein and has an open top end and a sealed bottom end. The basin has an inner wall and an outer wall, both of which are joined at least at a peripheral edge of the basin and separated by a distance sufficient to allow the water to flow therebetween. The outer wall is open at a central portion and is adapted for engaging the open top end of the pedestal for attaching the basin thereto. The inner wall has an aperture formed therethrough at a center portion thereof, and at least one drainage aperture formed proximate the peripheral edge of the basin. A water pump is disposed within the reservoir of the pedestal for pumping water from the reservoir through a basin supply conduit, through the aperture of the inner wall, and into the basin.

Abstract: An adjustable variable-effect fountain for a liquid, such as water, is disclosed. A support frame includes an upper support level, under which a pump is adapted to fit. The support frame includes a base that has a substantially hollow, water impermeable enclosure with an open top end. A cover plate having at least one apertures therein is adapted to fit at least partially within the top open end of the base to form the upper support level. An elongated pipe has an upper open end and a lower end adapted to engage an outlet port of the pump, and at least one of the apertures in the cover plate is of sufficient size to receive the pipe therethrough. A plurality of stackable members each include at least one aperture therethrough, each aperture being of sufficient size to receive the pipe therethrough. A bottom-most member is supported by the upper support level of the support frame.

Abstract: A comparator circuit is disclosed that senses a differential input polarity even when operating with a common mode voltage near the power rails (e.g., 50 millivolts) and under a wide range of process, temperature, and power supply conditions. In one aspect, the comparator circuit uses a complementary pair of P-type and N-type differential amplifiers. A combined P-type and N-type differential amplifier provides good transconductance even with a common mode voltage near either voltage rail. Consequently, a larger current swing than prior art circuits is provided to a current-to-voltage converter, which results in an overall faster circuit. In another aspect, a bias circuit drives a source follower that biases transistors in the differential amplifiers to ensure high transconductance and, consequently, high gain. Thus, the disclosed comparator senses differential input polarity even with a common mode voltage of only 50 millivolts or less.

Abstract: A voltage level translator is provided that operates over a wide range of voltage levels at a fast translation speed. The voltage level translator includes an input terminal that receives an input signal and a capacitor having its first terminal coupled to the input terminal. A clamp circuit is coupled to the input terminal and to the second terminal of the capacitor and operable to provide a signal on the second terminal of the capacitor in response to a first voltage level of the input signal. A voltage source circuit is coupled to the clamp circuit and to the second terminal of the capacitor and provides a signal on the second terminal of the capacitor in response to a second voltage level of the input signal. An output buffer has a first input terminal coupled to the first terminal of the capacitor and a second input terminal coupled to the second terminal of the capacitor.

Abstract: A voltage level translator is provided that operates over a wide range of voltage levels at a fast translation speed. The voltage level translator includes an input terminal that receives an input signal and a capacitor having its first terminal coupled to the input terminal. A clamp circuit is coupled to the input terminal and to the second terminal of the capacitor and operable to provide a signal on the second terminal of the capacitor in response to a first voltage level of the input signal. A voltage source circuit is coupled to the clamp circuit and to the second terminal of the capacitor and provides a signal on the second terminal of the capacitor in response to a second voltage level of the input signal. An output buffer has a first input terminal coupled to the first terminal of the capacitor and a second input terminal coupled to the second terminal of the capacitor.

Abstract: A sense amplifier is provided that mitigates the effect of threshold voltage mismatch within the sense amplifier. The sense amplifier has an inverter pair coupled to the input terminals, with a resistive element coupled across output terminals of the inverter pair. Inverter gain stages following the inverter pair are coupled to a current limiting circuit to monitor and limit the current flowing through the inverter gain stage immediately following the inverter pair. The current limiting circuit allows the sense amplifier to be biased such that speed is improved while limiting power dissipation to acceptable levels, even under undesirable process, temperature, and power supply variations.

Abstract: A CMOS OR circuit is fast and has a reduced sensitivity to the variations in the process, temperature and voltage supply. When the input signal to any one of a plurality of select transistor is in a logic high, a fixed supply of current is provided to the common drain terminal of the select transistors thereby to limit the amount of voltage swing of the common drain terminal and the common source terminal of the select transistors. A maximum power sensor senses the voltage differential developed between the common drain and the common source terminals of the select transistors and in response thereto generates a control signal which varies the amount of current that a variable current supply delivers to the common drain terminal thereby to prevent the output signal of the OR circuit from switching to the wrong state.

Abstract: An improved line driver is disclosed. In one embodiment, the line driver has three inverters and a pass gate. The first inverter has a first input terminal connected directly to the input line of the line driver. The first inverter also has an output terminal coupled to a first output line of the line driver. The second inverter has an output node coupled to a second output line of the line driver. The third inverter has a first input terminal connected directly to the input line of the line driver and an output terminal coupled to the input node of the second inverter. The pass gate has a second input terminal coupled to the input line of the line driver and an output terminal coupled to both the second input terminal of the first inverter and the second input terminal of the third inverter. The pass gate receives an enable signal at a first input terminal and provides a conduction path between the input line of the line driver and the output terminal of the pass gate in response to the enable signal.