Abstract: An optical data storage system including an amplifier which (i) provides a differential current input having a low impedance over the full range of frequencies for which amplification is required in an optical detector that includes a photodiode that senses the intensity of an optical signal generated by data on the optical storage medium; (ii) reverse biases the photodiode; (iii) amplifies the signal current from both sides of the photodiode to improve signal-to-noise ratio; and (iv) is isolated from and unaffected by power supply noise.

Abstract: A clock phase discriminator measures phase difference between a pair of digital clock signals to produce phase error signals used to adjust the frequency of one clock so as to reduce the phase difference. The discriminator includes a latch circuit that responds to successive transitions of the clock signals by undertaking a multistate phase measurement transition path in which only one state variable changes at a time. The latch circuit reduces the exposure of the phase discriminator to race conditions while measuring the phase difference and producing the error signals.

Abstract: A phase discriminator and data standardizer apparatus measures phase difference between a data signal obtained from a magnetic disk device and a variable-frequency reference data clock. From the measured phase difference, the apparatus develops a phase difference signal used to adjust the frequency of the reference data clock in order to reduce the phase difference. The apparatus includes a multi-state latch circuit that responds to the input data and clock signals by measuring the phase in a phase measurement transition cycle in which only one state variable changes at a time and producing the phase difference signal based upon the measurement. A gate responds to the measurement transition cycle by producing the phase difference signal. The apparatus further standardizes the input data so as to provide the data in a format that is predictably standardized in its time relationship to the reference data clock signal.

Abstract: A readout signal detection circuit comprises a data signal detector which senses changes in voltage of the signal waveform relative to signal peak amplitude; a threshold detector for sensing signal peak magnitudes that exceed a preset magnitude; a differentiator to locate signal peak position; and logic circuitry to test the validity of a linear readout signal applied to the detectors and the differentiator in parallel. A ramp timer provides a delay and fixed period during which the readout signal is checked for validity.