Abstract: A more robust universal asynchronous receiver-transmitter (UART) protocol utilizing a pattern matching methodology to evaluate and decode a serial data stream in noisy environments is provided. The UART protocol is may further allow for adjustment of the expected edge of a data bit within the serial data stream to reduce and/or eliminate drift in the data stream.

Abstract: A more robust universal asynchronous receiver-transmitter (UART) protocol utilizing a pattern matching methodology to evaluate and decode a serial data stream in noisy environments is provided. The UART protocol is may further allow for adjustment of the expected edge of a data bit within the serial data stream to reduce and/or eliminate drift in the data stream.

Abstract: A TTL gate (26) with a Darlington output (14,14A,16) includes three circuits (28,30,32) to decrease the gate switching time during an output transition from a high to a low logic state and from a high impedance state to a low logic state. Each speedup circuit drives the gate input transistor (12) for a different length of time, ensuring that the lower output transistor (16) turns on rapidly and remains on until the output transition is complete. The circuits ensure, however, that the additional drive current (82) is time limited to avoid excessive power consumption.

Abstract: A processor (10) operable to calculate division and square root functions comprises a multiplier (48) having a multiplier array (116), a pipeline register (50), a correction generator (122), and a converter/rounder (52). The products generated by the multiplier array (116) are fed back to the multiplier (48) to avoid delays associated with the remainder of the multiplier circuitry. The correction generator (122) which performs a subtraction of the product output form the multiplier array (116) from a constant, is disposed between the multiplier array (116) and the converter/rounder (52). Hence, the subtraction necessry to compute the next estimate may be performed in parallel with other multiplications, further reducing the time necessary to perform the calculation. Compare circuitry (120) is operable to compare the final approximation with an operand to quickly determine the direction of rounding.