Patents by Inventor DALE CHARLES MAIN

DALE CHARLES MAIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10481809
    Abstract: A data storage device includes a solid-state non-volatile memory including a plurality of memory cells and a controller. The controller is configured to reduce a read disturb effect of at least a portion of the solid-state non-volatile memory at least in part by receiving or accessing data to be written to the solid-state non-volatile memory, encoding the data using a programming pattern that favors a first programming state over a second programming state, the first programming state being associated with a higher voltage level than the second programming state, and writing the encoded data to the solid-state non-volatile memory.
    Type: Grant
    Filed: July 4, 2017
    Date of Patent: November 19, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: Abhilash Ravi Kashyap, Dale Charles Main
  • Patent number: 10095652
    Abstract: A dynamically configurable device including a connector configured to detect a first status of an interface selection mechanism, and a first Serializer De-serializer (SerDes) configured to drive a first selected interface from among a plurality of interfaces based on the first status. In response to the first status having a first state, the first selected interface is a first interface that causes the dynamically configurable device to present as a first type of device, and in response to the first status having a second state, the first selected interface is a second interface that causes the dynamically configurable device to present as a second type of device.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: October 9, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dean M. Jenkins, Dale Charles Main
  • Publication number: 20180225252
    Abstract: A dynamically configurable device including a connector configured to detect a first status of an interface selection mechanism, and a first Serializer De-serializer (SerDes) configured to drive a first selected interface from among a plurality of interfaces based on the first status. In response to the first status having a first state, the first selected interface is a first interface that causes the dynamically configurable device to present as a first type of device, and in response to the first status having a second state, the first selected interface is a second interface that causes the dynamically configurable device to present as a second type of device.
    Type: Application
    Filed: April 10, 2018
    Publication date: August 9, 2018
    Inventors: Dean M. Jenkins, Dale Charles Main
  • Patent number: 10021777
    Abstract: Systems and methods are disclosed for managing temperature in a data storage device. A data storage device includes non-volatile solid-state memory, a temperature sensor, a heating device, and a controller. The controller is configured to receive a temperature signal from the temperature sensor indicating a temperature of at least a portion of the data storage device, determine that the temperature is below a first predetermined threshold, activate the heating device to increase the temperature of the at least a portion of the data storage device, and write data associated with a write command to the non-volatile solid-state memory.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: July 10, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kroum S. Stoev, Dean Mitcham Jenkins, Dale Charles Main
  • Patent number: 9946681
    Abstract: A dynamically configurable device including a connector configured to detect a first status of an interface selection mechanism, and a first Serializer De-serializer (SerDes) configured to drive a first selected interface from among a plurality of interfaces based on the first status. In response to the first status having a first state, the first selected interface is a first interface that causes the dynamically configurable device to present as a first type of device, and in response to the first status having a second state, the first selected interface is a second interface that causes the dynamically configurable device to present as a second type of device.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: April 17, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dean M. Jenkins, Dale Charles Main
  • Patent number: 9928203
    Abstract: Systems and methods are disclosed for monitoring object storage in a data storage system. A storage device tray assembly includes a plurality of data storage bays configured to receive data storage devices, a plurality of data storage devices mounted in the plurality of data storage bays, and an interface expander device communicatively coupled to each of the data storage devices over a first communication interface. The interface expander device may include non-volatile memory storing object storage monitor code and operating system code, and one or more processors configured to perform port or switch initialization for communications to the plurality of data storage devices and execute the operating system code and the object storage monitor code to provide object storage monitor functionality for the plurality of data storage devices.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: March 27, 2018
    Assignee: Western Digital
    Inventors: Dean Mitcham Jenkins, Dale Charles Main
  • Patent number: 9922727
    Abstract: A data storage device includes a solid-state memory including memory cells and a controller configured to implement a data protection programming scheme by programming a first subset of the cells to a first voltage state using a first target voltage, programs a second subset to a second voltage state using a second target voltage higher than the first target voltage, programs a third subset to a third voltage state using a third target voltage higher than the second target voltage, and programs a fourth subset to a fourth voltage state using a fourth target voltage higher than the third target voltage. A difference in voltage between the fourth target voltage and the third target voltage may be greater or less than a difference in voltage between the third target voltage and the second target voltage and/or a difference in voltage between the second target voltage and the first target voltage.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: March 20, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dale Charles Main, Abhilash Ravi Kashyap
  • Patent number: 9857999
    Abstract: Systems and methods are disclosed for estimating charge loss in solid-state memory devices using electrical sensors. A data storage device includes a solid-state non-volatile memory comprising a plurality of memory cells, a sensor configured to hold an electric charge, and a controller. The controller is configured to charge the sensor to a first charge level at a first point in time, determine a second charge level of the sensor at a second point in time, after a time period from the first point in time, and refresh data stored in the memory cells based at least in part on the determined second charge level.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: January 2, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dale Charles Main, Dean Mitcham Jenkins
  • Publication number: 20170300256
    Abstract: A data storage device includes a solid-state non-volatile memory including a plurality of memory cells and a controller. The controller is configured to reduce a read disturb effect of at least a portion of the solid-state non-volatile memory at least in part by receiving or accessing data to be written to the solid-state non-volatile memory, encoding the data using a programming pattern that favors a first programming state over a second programming state, the first programming state being associated with a higher voltage level than the second programming state, and writing the encoded data to the solid-state non-volatile memory.
    Type: Application
    Filed: July 4, 2017
    Publication date: October 19, 2017
    Inventors: ABHILASH RAVI KASHYAP, DALE CHARLES MAIN
  • Publication number: 20170257940
    Abstract: Systems and methods are disclosed for managing temperature in a data storage device. A data storage device includes non-volatile solid-state memory, a temperature sensor, a heating device, and a controller. The controller is configured to receive a temperature signal from the temperature sensor indicating a temperature of at least a portion of the data storage device, determine that the temperature is below a first predetermined threshold, activate the heating device to increase the temperature of the at least a portion of the data storage device, and write data associated with a write command to the non-volatile solid-state memory.
    Type: Application
    Filed: May 23, 2017
    Publication date: September 7, 2017
    Inventors: Kroum S. STOEV, Dean Mitcham JENKINS, Dale Charles MAIN
  • Patent number: 9727261
    Abstract: Systems and methods are disclosed for programming data in non-volatile memory arrays. A data storage device includes a solid-state non-volatile memory including a plurality of memory cells and a controller configured to improve data retention or reduce read disturb of at least a portion of the solid-state non-volatile memory at least in part by receiving data to be written to the solid-state non-volatile memory. The controller is further configured to, when a data retention programming mode is set, encode the data using a programming pattern that favors a first programming state over a second programming state, the first programming state being associated with a lower voltage level than the second programming state, and write the encoded data to the solid-state non-volatile memory. When a read disturb programming mode is set, the first programming state is associated with a higher voltage level than the second programming state.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: August 8, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Abhilash Ravi Kashyap, Dale Charles Main
  • Publication number: 20170194062
    Abstract: A data storage device includes a solid-state memory including memory cells and a controller configured to implement a data protection programming scheme by programming a first subset of the cells to a first voltage state using a first target voltage, programs a second subset to a second voltage state using a second target voltage higher than the first target voltage, programs a third subset to a third voltage state using a third target voltage higher than the second target voltage, and programs a fourth subset to a fourth voltage state using a fourth target voltage higher than the third target voltage. A difference in voltage between the fourth target voltage and the third target voltage may be greater or less than a difference in voltage between the third target voltage and the second target voltage and/or a difference in voltage between the second target voltage and the first target voltage.
    Type: Application
    Filed: March 22, 2017
    Publication date: July 6, 2017
    Inventors: DALE CHARLES MAIN, ABHILASH RAVI KASHYAP
  • Patent number: 9668337
    Abstract: Systems and methods are disclosed for managing temperature in a data storage device. A data storage device includes non-volatile solid-state memory, a temperature sensor, a heating device, and a controller. The controller is configured to receive a temperature signal from the temperature sensor indicating a temperature of at least a portion of the data storage device, determine that the temperature is below a first predetermined threshold, activate the heating device to increase the temperature of the at least a portion of the data storage device, and write data associated with a write command to the non-volatile solid-state memory.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: May 30, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Kroum S. Stoev, Dean Mitcham Jenkins, Dale Charles Main
  • Publication number: 20170131924
    Abstract: Systems and methods are disclosed for estimating charge loss in solid-state memory devices using electrical sensors. A data storage device includes a solid-state non-volatile memory comprising a plurality of memory cells, a sensor configured to hold an electric charge, and a controller. The controller is configured to charge the sensor to a first charge level at a first point in time, determine a second charge level of the sensor at a second point in time, after a time period from the first point in time, and refresh data stored in the memory cells based at least in part on the determined second charge level.
    Type: Application
    Filed: November 9, 2015
    Publication date: May 11, 2017
    Inventors: DALE CHARLES MAIN, DEAN MITCHAM JENKINS
  • Publication number: 20170125105
    Abstract: A data storage device includes a solid-state memory including memory cells and a controller configured to perform a first programming scheme that programs a first subset of the cells to a first voltage state using a first target voltage, programs a second subset to a second voltage state using a second target voltage higher than the first target voltage, programs a third subset to a third voltage state using a third target voltage higher than the second target voltage, and programs a fourth subset to a fourth voltage state using a fourth target voltage higher than the third target voltage. A difference in voltage between the fourth target voltage and the third target voltage may be greater or less than a difference in voltage between the third target voltage and the second target voltage and/or a difference in voltage between the second target voltage and the first target voltage.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 4, 2017
    Inventors: DALE CHARLES MAIN, ABHILASH RAVI KASHYAP
  • Patent number: 9620226
    Abstract: A data storage device includes a solid-state memory including memory cells and a controller configured to perform a first programming scheme that programs a first subset of the cells to a first voltage state using a first target voltage, programs a second subset to a second voltage state using a second target voltage higher than the first target voltage, programs a third subset to a third voltage state using a third target voltage higher than the second target voltage, and programs a fourth subset to a fourth voltage state using a fourth target voltage higher than the third target voltage. A difference in voltage between the fourth target voltage and the third target voltage may be greater or less than a difference in voltage between the third target voltage and the second target voltage and/or a difference in voltage between the second target voltage and the first target voltage.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: April 11, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dale Charles Main, Abhilash Ravi Kashyap
  • Publication number: 20170090785
    Abstract: Systems and methods are disclosed for programming data in non-volatile memory arrays. A data storage device includes a solid-state non-volatile memory including a plurality of memory cells and a controller configured to improve data retention or reduce read disturb of at least a portion of the solid-state non-volatile memory at least in part by receiving data to be written to the solid-state non-volatile memory. The controller is further configured to, when a data retention programming mode is set, encode the data using a programming pattern that favors a first programming state over a second programming state, the first programming state being associated with a lower voltage level than the second programming state, and write the encoded data to the solid-state non-volatile memory. When a read disturb programming mode is set, the first programming state is associated with a higher voltage level than the second programming state.
    Type: Application
    Filed: September 24, 2015
    Publication date: March 30, 2017
    Inventors: ABHILASH RAVI KASHYAP, DALE CHARLES MAIN
  • Publication number: 20170071056
    Abstract: Systems and methods are disclosed for managing temperature in a data storage device. A data storage device includes non-volatile solid-state memory, a temperature sensor, a heating device, and a controller. The controller is configured to receive a temperature signal from the temperature sensor indicating a temperature of at least a portion of the data storage device, determine that the temperature is below a first predetermined threshold, activate the heating device to increase the temperature of the at least a portion of the data storage device, and write data associated with a write command to the non-volatile solid-state memory.
    Type: Application
    Filed: September 8, 2015
    Publication date: March 9, 2017
    Inventors: KROUM S. STOEV, DEAN MITCHAM JENKINS, DALE CHARLES MAIN