Abstract: Methods and apparatus are provided for a fail-operational global time reference for a synchronous redundant data bus including multiple pluralities of timing servers cross-coupled between a plurality of buses in said redundant synchronous data bus system, the apparatus comprising each said timing server of the multiple pluralities of timing servers configured to transmit, receive, and monitor synchronization signals, to store a unique constant, and to independently and automatically select as timing master one or more timing servers from among the multiple pluralities of timing servers based on said synchronization signals received from one or more of said timing servers of said multiple pluralities of timing servers and further based upon a relationship among said unique constants stored in each timing server. Methods comprising selection protocols are also provided.

Abstract: Methods and apparatus are provided for more reliably transferring operational control for various aircraft flight control surfaces from a first sub-system to a second sub-system. The present invention provides an Actuator Control Electronics (ACE) wrap-back module that monitors the output of the normal mode control module and switches control to the direct control module based upon the detection of an error condition. The switching function is controlled by a monitoring system that monitors the output from an integrated heartbeat module that emits a pre-programmed signal. The pre-programmed signal is encoded and sent over a communication bus where it is then decoded and validated by comparing the decoded signal to the expected results. Any irregularity in the heartbeat signal automatically triggers a change of control from the first flight control sub-system to the second flight control sub-system.

Abstract: A feedback control system which uses estimated back electromotive force(EMF) from a controlled actuator to provide feedback into the control system and improve control of the actuator. Back EMF is estimated from current through the actuator and voltage across the actuator. The estimated back EMF signal is fed back into the control system where it serves as a rate term. In the preferred embodiment the back EMF signal is used in combination with an actuator position signal which is also feedback into the control system. A complementary filter conditions both the rate and position signals for improved performance. The invention is particularly suited for controlling linear actuators which do not provide conventional rate feedback signals.

Abstract: A channel of an automatic flight control system utilizes dual identical digital processors. Active task modules and monitor modules therefor are included in the processors. The active task modules and the monitor modules are arranged so that an active task module in one processor has a corresponding monitor module in the other processor where the corresponding modules perform disparate functionality over disjoint computation paths with respect to each other. The monitor module tests to determine if the aircraft is performing in a manner prohibited by the functionality controlled by the associated task module.

Abstract: An automatic flight control system having two digital processors receives sensor data over a bit serial data bus through a serial-to-parallel converter. The converter formats the data into bytes corresponding to the data parameters from the sensors. One of the processors controls the bus timing and receives the data bytes which are simultaneously applied to an independent data storage element. An independent address sequencer provides sequential addresses to the independent data storage element at which to store sequential data bytes from the converter. After an entire data frame is stored in the independent data storage element, the second processor performs a bulk move of the data into its local data storage element. The sensors are configured in data subsystems which provide respective messages, each message containing an address identifying the subsystem. These addresses are utilized for directing the data messages to respective areas in the independent data storage element.

Abstract: A communication bus user design that significantly reduces the likelihood of bus disablement. Request to transmit received by a user are validated in the communications processor and by an interlock circuit. Logic signals generated in response to the two validations are coupled to an AND gate, wherefrom an enabling signal is coupled to an amplifier when the two logic signals coincide. Communications signals from the communications processor are thereafter coupled via the amplifier to the bus.

Abstract: A servo motor feedback fault detector that combines the motor drive voltage, the current flowing through the motor and the rotational speed of the motor and compares this combined signal with a dynamic threshold generated by combining a percentage tolerance of the motor current with a percentage tolerance of the motor rotational rate.