Abstract: A method and lock detector for detecting lock between a reference signal and a feedback signal of a PLL circuit. A number of clock cycles of the feedback signal is counted during consecutive test intervals defined by the reference signal. A feedback comparator determines whether the number of clock cycles of the feedback signal during a given test interval is within an expected range. Before lock has been indicated, a qualification counter is either incremented or reset after each test interval in accordance with the expected range determination. A lock indication signal indicating that lock has been achieved is provided if said qualification counter exceeds a qualification threshold.

Abstract: An integrated circuit has a phase-locked loop (PLL) frequency synthesizer circuit which has a charge pump circuit for providing an output control voltage to adjust an oscillator frequency in response to fast and slow signals provided by a phase detector. The charge pump circuit has first and second current sources, and a switching network for selectively coupling, in response to said fast signal, the first current source to one of an internal node and an output node coupled to an output capacitor and having an output voltage, and, in response to said slow signal, the second current source to one of the internal node and the output node.

Abstract: A highly accurate tuning circuit for a tunable filter is provided which trims an RC time constant based on variances in both a formed capacitive component as well as variances in formed resistive components. A capacitor and resistor based tuning control circuit includes both a formed capacitor based tuning reference current generator and a formed resistor based tuning voltage reference generator. Each generates a voltage reference which is compared to the other to determine control signals for tuning a tunable resistive component forming the resistive portion of the RC time constant of the relevant filter. The resistive component is tuned by shorting selective resistors in the tunable resistive component.

Abstract: An integrated circuit comprising a balanced differential amplifier. The balanced differential amplifier has a first single-ended differential amplifier coupled at a first negative differential input terminal to a first input signal through a feedback network also coupled to an output terminal of the first amplifier. The first amplifier is also coupled at a first positive differential input terminal to a second input signal through a first resistor and to a reference voltage. The balanced differential amplifier also has a second single-ended differential amplifier coupled at a second negative differential input terminal to the second input signal through a second feedback network also coupled to an output terminal of the second amplifier. The second amplifier is also coupled at a second positive differential input terminal to the first input signal through a second resistor and to the reference voltage.

Abstract: A method of transmitting a voice communications signal includes the steps of sampling the signal and creating digital representations of the samples. The digital representations are speech-coded to create speech-coded data which is converted to analog symbols. A carrier in the 46-49 MHz band is modulated by the analog symbols and transmitted. A method of receiving a voice communications signal includes the steps of receiving a modulated carrier in the 46-49 MHz band and demodulating the modulated carrier to recover analog symbols. The analog symbols are converted to digital samples, which are then converted to speech-coded data. The speech-coded data are decoded to produce digitized samples, which are converted to analog samples and filtered to produce the voice communications signal. A cordless telephone system according to the invention includes a handset and a base unit.

Abstract: A crystal tank circuit is connected between the ac cross-coupled outputs of two transistors that are selectively biased to an appropriate common mode voltage to cause rapid build-up of oscillation when the circuit is turned on and in which oscillation is sustained in the desired mode regardless of battery voltage fluctuation without wasting power. The differentially driven frequency-controlling crystal tank circuit receives balanced driving voltage excursions from the circuit.

Abstract: A Voltage Controlled Oscillator (VCO) mitigates the effects of package parasitics by providing positive feedback connections, to sustain a desired oscillation, external to the IC package, thereby mitigating the effect of the bond wires and internal parasitics to allow the oscillation to be controlled by the desired external components. The VCO includes an electronic circuit with gain that is at least part of an integrated circuit (IC) and a package for the IC. A passive resonant circuit may be provided external to the IC package. The positive feedback of the electronic circuit is provided through at least one additional lead of the package, such that the connection is external to the package.