Patents by Inventor Dale Jonathan Pearson

Dale Jonathan Pearson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6985169
    Abstract: An image capture system for mobile communications systems includes an imaging device for capturing optical image data and a data transfer apparatus coupled to a communications device communications device for transferring the optical image data to the communications device for transmittal over a communications network.
    Type: Grant
    Filed: February 9, 1998
    Date of Patent: January 10, 2006
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: Zhong John Deng, Sudhir Muniswamy Gowda, John P. Karidis, Dale Jonathan Pearson, Rama Nand Singh, Hon-Sum Philip Wong, Jungwook Yang
  • Patent number: 6628333
    Abstract: In an illustrative embodiment, an instant camera is provided which includes an imager for receiving an image of an object to be photographed. The imager outputs a signal corresponding to the received image, and a memory device stores the signal. A printer prints instant film photographs corresponding to received or stored images, and has the capability to print at least one image on a single piece of instant film. A preview unit has at least one display for displaying an image corresponding to a received or stored image. A controller, in communication with the imager, the memory device, the printer, and the preview unit, controls the transfer of the signal from the imager to the memory device, from the memory device to the printer, and from the memory device to the preview unit.
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: September 30, 2003
    Assignee: International Business Machines Corporation
    Inventors: Sudhir Muniswamy Gowda, Mary Yvonne Lanzerotti, Dale Jonathan Pearson, Hon-Sum Philip Wong
  • Patent number: 6090710
    Abstract: A method of making Copper alloys containing between 0.01 and 10 weight percent of at least one alloying element selected from carbon, indium and tin is disclosed for improved electromigration resistance, low resistivity and good corrosion resistance that can be used in chip and package interconnections and conductors by first forming the copper alloy and then annealing it to cause the diffusion of the alloying element toward the grain boundaries between the grains in the alloy are disclosed.
    Type: Grant
    Filed: August 15, 1997
    Date of Patent: July 18, 2000
    Assignee: International Business Machines Corporation
    Inventors: Panayotis Constantinou Andricacos, Hariklia Deligianni, James McKell Edwin Harper, Chao-Kun Hu, Dale Jonathan Pearson, Scott Kevin Reynolds, King-Ning Tu, Cyprian Emeka Uzoh
  • Patent number: 6063506
    Abstract: Copper alloys containing between 0.01 and 10 weight percent of at least one alloying element selected from carbon, indium and tin for improved electromigration resistance, low resistivity and good corrosion resistance that can be used in chip and package interconnections and a method of making such interconnections and conductors by first forming the copper alloy and then annealing it to cause the diffusion of the alloying element toward the grain boundaries between the grains in the alloy are disclosed.
    Type: Grant
    Filed: June 8, 1998
    Date of Patent: May 16, 2000
    Assignee: International Business Machines Corporation
    Inventors: Panayotis Constantinou Andricacos, Hariklia Deligianni, James McKell Edwin Harper, Chao-Kun Hu, Dale Jonathan Pearson, Scott Kevin Reynolds, King-Ning Tu, Cyprian Emeka Uzoh
  • Patent number: 6014189
    Abstract: An apparatus and method for providing a display cell structure based on the transmissive liquid crystal technology with a useful aperture ratio even as the cell size shrinks to less than 20 microns. The invention overcomes a problem of the prior art wherein the fractional area transmitting the light of the conventional designs becomes unacceptably low due to the aperture reducing opaque storage capacitor. This reduction in aperture ratio is removed in this invention by hiding the trench capacitor below the row and column x,y lines. The cell storage capacitor is formed using a vertical trench capacitor in SOI. Although useful even in standard display sizes and configurations, the invention is particularly useful for head-mounted displays and/or optical projection displays at the UXGA form factor for both monochromatic and color displays. Alternate capacitor configurations are described.
    Type: Grant
    Filed: November 15, 1996
    Date of Patent: January 11, 2000
    Assignee: International Business Machines Corporation
    Inventors: Russell Alan Budd, George Liang-Tai Chiu, Dale Jonathan Pearson
  • Patent number: 5999234
    Abstract: A method and structure is presented for a display with reduced size pixels while retaining the transmissive approach. This enables continued use the least expensive transmission optics available. In an embodiment, it employs back-end-of-the-line vertical cells built on top of the row and column x, y lines of the pixels. In a PDLC type display embodiment each vertical cell is filled with PDLC which operates in a normally black mode known as the PDLC reverse mode. When the pixel control voltage is set ON, the liquid crystal is perpendicular to the light path resulting in a light pass through providing a bright state. When the control voltage is set OFF, the liquid crystals are randomly oriented, only the scattered light goes through the cell, so the pixel is in its OFF state. PDLC used here has two advantages. Firstly, the PDLC requires no rubbing. It is difficult to rub individual cell walls. Secondly, the use of both polarizations by the PDLC increases its luminous efficiency.
    Type: Grant
    Filed: April 15, 1997
    Date of Patent: December 7, 1999
    Assignee: International Business Machines Corporation
    Inventors: Russell Alan Budd, George Liang-Tai Chiu, Dale Jonathan Pearson
  • Patent number: 5909127
    Abstract: This invention provides a circuit and method to replace the passive resistive or statically biased active load devices with dynamically biased active load devices. This allows the load devices to present an effective load which varies depending on the state of the circuit output. The effective load and the time rate of change of the effective load can be dynamically optimized to improve circuit performance with changing conditions. The effective load is varied according to the state of the circuit by the use of time-delayed negative feedback. The biasing of the load devices is also capable to control the logic swing of the circuit. A bias generating circuit employing a dynamically biased active load is described. This provides a method for a family of logic circuits, especially CML circuits, to operate at low voltage and low power at high switching speeds, having symmetrical rise and fall times and well defined logic signal swings.
    Type: Grant
    Filed: February 14, 1996
    Date of Patent: June 1, 1999
    Assignee: International Business Machines Corporation
    Inventors: Dale Jonathan Pearson, Scott Kevin Reynolds