Patents by Inventor Dali Li

Dali Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250250586
    Abstract: A base editing system for achieving A-to-C and/or A-to-T base mutations and a use thereof are provided. A base editor is constructed by means of fusing 3-methyladenine DNA glycosylase with adenosine deaminase and Cas9 nuclease with impaired catalytic activity, which achieves adenine-based transversion for the first time. It is found through experimental comparison that AXBE, which is constructed by means of fusing mouse-derived 3-methyladenine DNA glycosylase with adenosine deaminase TadA-8e derived from E. coli and Cas9 nickase with impaired catalytic activity derived from Streptococcus pyogenes, has the best effect of catalyzing the transversion of adenine. The use of the base editing system in the gene therapy, cell therapy, human disease model production, and crop genetic breeding, etc. is promoted.
    Type: Application
    Filed: August 27, 2021
    Publication date: August 7, 2025
    Applicant: EAST CHINA NORMAL UNIVERSITY
    Inventors: Liang CHEN, Dali LI, Mengjia HONG, Changming LUAN
  • Publication number: 20240237483
    Abstract: The present disclosure provides a display panel, a manufacturing method thereof, and a display apparatus. The display panel includes a display area, provided with at least one to-be-dug area; and an annular isolation area, surrounding the to-be-dug area, and arranged between the to-be-dug area and the display area surrounding the to-be-dug area, the annular isolation area includes a first annular blocking dam surrounding the to-be-dug area. The display panel includes: a base substrate, an electroluminescent layer, an encapsulation layer and a filling layer. An orthographic projection of the filling layer on the base substrate is within a range of orthographic projections of the to-be-dug area and the annular isolation area on the base substrate.
    Type: Application
    Filed: March 22, 2021
    Publication date: July 11, 2024
    Inventors: Yong HU, Zerui ZHANG, Dali LI
  • Publication number: 20240172528
    Abstract: The present disclosure provides a display substrate, a method for manufacturing thereof and a display apparatus. The display substrate includes: a base substrate having a holing area, a display area around the holing area and an isolation area between the display area and the holing area; at least one circle of blocking wall in the isolation area and around the holing area; an encapsulation layer, on one side of a layer where the blocking wall is located away from the base substrate; a first protection layer, on one side of the encapsulation layer away from the base substrate; and a filling layer, on one side of the first protection layer away from the base substrate, in the isolation area, completely covering the at least one circle of blocking wall and at least partially overlapping with the encapsulation layer.
    Type: Application
    Filed: March 15, 2021
    Publication date: May 23, 2024
    Inventors: Dali LI, Zerui ZHANG, Yong HU, Zifeng WANG, Hyoungseok PARK
  • Patent number: 11930665
    Abstract: A display substrate has a display region and a peripheral region. The display substrate includes a substrate, a first dam, a second dam and a connection portion. The first dam and the second dam are located on a side of the substrate, and are located in the peripheral region. The second dam is farther from the display region than the first dam. A height of the second dam is greater than a height of the first dam. The connection portion is located between the first dam and the second dam. The connection portion connects the first dam and the second dam, and a height of the connection portion is less than the height of the first dam. At least a portion of the first dam, at least a portion of the connection portion and at least a portion of the second dam are of an integrative structure.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: March 12, 2024
    Assignees: MIANYANG BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yong Hu, Zerui Zhang, Dali Li, Xin Luo
  • Patent number: 11903253
    Abstract: A display substrate and a display device are disclosed. The display substrate includes a display area and a frame area, and the display substrate includes a substrate, a plurality of sub-pixels on a side of the substrate, the plurality of sub-pixels are configured to emit light in the display area, an encapsulation layer on a side of the plurality of sub-pixels away from the substrate, and a retaining wall located in the frame area, the retaining wall is located between the encapsulation layer and the substrate and includes a first sub-retaining wall, a second sub-retaining wall, and a transition area between the first sub-retaining wall and the second sub-retaining wall, the retaining wall includes at least one layer provided in the same layer, the at least one layer provided in the same layer continuously extends across the first sub-retaining wall, the second sub-retaining wall and the transition area.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: February 13, 2024
    Assignees: MIANYANG BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lina Wang, Zifeng Wang, Haoyuan Fan, Jenyu Lee, Yong Hu, Zerui Zhang, Dali Li
  • Patent number: 11901815
    Abstract: Disclosed are a voltage compensation method and device of a voltage reducing circuit. The voltage compensation method includes: determining a capacitance value of each capacitor and a resistance value of each resistor in a voltage compensation circuit according to a voltage compensation expectation of the voltage reducing circuit; determining each zero and each pole of a transfer function of the voltage compensation circuit according to the capacitance value of each capacitor and the resistance value of each resistor; setting each capacitor and the resistor not in direct connection with the capacitor in series to have a positive temperature coefficient, and setting the resistor in direct connection with the capacitor in series to have a negative temperature coefficient; and compensating voltage for the voltage reducing circuit by using the voltage compensation circuit to output a rated voltage.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: February 13, 2024
    Assignee: INSPUR SU ZHOU INTELLIGENT TECHNOLOGY CO., LTD.
    Inventors: Yingchao Li, Dali Li
  • Publication number: 20240030814
    Abstract: Disclosed in the present disclosure is a high-dynamic-response switching power supply and a server. The switching power supply includes: a first output path includes a first field-effect transistor, a flying capacitor, and a primary coil of a first Trans-inductor (TL) which are sequentially connected in series; the second output path includes a fourth field-effect transistor and a primary coil of a second TL which are connected in series; the resonant loop includes a secondary coil of a first TL, a secondary coil of a second TL and a resonant inductor which are annularly connected, and the secondary coil of the first TL and the secondary coil of the second TL each generate an inductive current in response to a current change in the corresponding primary coils thereof; and the resonant switch includes a second field-effect transistor and a third field-effect transistor. The present disclosure may respond to a high-power dynamic load requirement at high speed as well as reduce hardware materials and costs.
    Type: Application
    Filed: September 28, 2021
    Publication date: January 25, 2024
    Inventors: Changhua GOU, Dali LI
  • Publication number: 20230345793
    Abstract: A display substrate has a display region and a peripheral region. The display substrate includes a substrate, a first dam, a second dam and a connection portion. The first dam and the second dam are located on a side of the substrate, and are located in the peripheral region. The second dam is farther from the display region than the first dam. A height of the second dam is greater than a height of the first dam. The connection portion is located between the first dam and the second dam. The connection portion connects the first dam and the second dam, and a height of the connection portion is less than the height of the first dam. At least a portion of the first dam, at least a portion of the connection portion and at least a portion of the second dam are of an integrative structure.
    Type: Application
    Filed: July 30, 2021
    Publication date: October 26, 2023
    Inventors: Yong HU, Zerui ZHANG, Dali LI, Xin LUO
  • Patent number: 11737340
    Abstract: Disclosed are a display panel, a manufacturing method thereof and display equipment. The display panel comprises a display area, the display area comprises a camera area and a peripheral area surrounding the camera area, the camera area is provided with a transparent first touch control structure, and the first touch control structure is arranged between a substrate and an organic luminescent layer.
    Type: Grant
    Filed: June 20, 2021
    Date of Patent: August 22, 2023
    Assignees: MIANYANG BOE OPTOELECTRONICS TECHNOLOGY CO., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Dali Li, Zerui Zhang, Yong Hu
  • Publication number: 20220364072
    Abstract: Provided are a fusion protein that improves gene editing efficiency and an application thereof. The fusion protein comprises a single-stranded DNA binding protein functional domain, nucleoside deaminase and nuclease. According to CBEs, when carrying our base conversion from C-G to T-A, nucleoside deaminase such as cytosine deaminase carries out deamination by using single-stranded DNA as a substrate, and by re-fusing the single-stranded DNA binding protein functional domain on the fusion protein of the nucleoside deaminase and nuclease, the chance of single-stranded DNA being exposed to the nucleoside deaminase is greatly increased, thereby significantly improving base editing efficiency. The present disclosure provides a breakthrough improvement of single-base gene editing technology and can greatly promote the application thereof in aspects such as gene editing, gene therapy, cell therapy, animal model making, and crop genetic breeding.
    Type: Application
    Filed: June 17, 2022
    Publication date: November 17, 2022
    Inventors: Dali LI, Xiaohui ZHANG, Mingyao LIU, Biyun ZHU, Liang CHEN
  • Publication number: 20220356456
    Abstract: Disclosed is an sgRNA guiding a PD1 gene for cleavage to achieve the efficient integration of exogenous sequences. The method for gene editing a PD1 gene in cells includes the steps of introducing a nuclease and an sgRNA into cells, and gene-editing the PD1 gene. The sgRNA guides the nuclease to cleave the PD1 gene and forms a broken site, at which an exogenous donor repair template can also be introduced, so that CAR-T elements can be directionally inserted at the specific site of the PD1 locus to construct enhanced CD19-CART cells with PD1 knockout in one step.
    Type: Application
    Filed: July 9, 2020
    Publication date: November 10, 2022
    Applicant: BRL MEDICINE INC.
    Inventors: Jiqin ZHANG, Jiaxuan YANG, Yue TIAN, Bing DU, Dali LI, Mingyao LIU, Zaixi XI
  • Publication number: 20220238618
    Abstract: A display substrate and a display device are disclosed. The display substrate includes a display area and a frame area, and the display substrate includes a substrate, a plurality of sub-pixels on a side of the substrate, the plurality of sub-pixels are configured to emit light in the display area, an encapsulation layer on a side of the plurality of sub-pixels away from the substrate, and a retaining wall located in the frame area, the retaining wall is located between the encapsulation layer and the substrate and includes a first sub-retaining wall, a second sub-retaining wall, and a transition area between the first sub-retaining wall and the second sub-retaining wall, the retaining wall includes at least one layer provided in the same layer, the at least one layer provided in the same layer continuously extends across the first sub-retaining wall, the second sub-retaining wall and the transition area.
    Type: Application
    Filed: August 27, 2021
    Publication date: July 28, 2022
    Inventors: Lina WANG, Zifeng WANG, Haoyuan FAN, Jenyu LEE, Yong HU, Zerui ZHANG, Dali LI
  • Publication number: 20220224226
    Abstract: Disclosed are a voltage compensation method and device of a voltage reducing circuit. The voltage compensation method includes: determining a capacitance value of each capacitor and a resistance value of each resistor in a voltage compensation circuit according to a voltage compensation expectation of the voltage reducing circuit; determining each zero and each pole of a transfer function of the voltage compensation circuit according to the capacitance value of each capacitor and the resistance value of each resistor; setting each capacitor and the resistor not in direct connection with the capacitor in series to have a positive temperature coefficient, and setting the resistor in direct connection with the capacitor in series to have a negative temperature coefficient; and compensating voltage for the voltage reducing circuit by using the voltage compensation circuit to output a rated voltage.
    Type: Application
    Filed: July 31, 2019
    Publication date: July 14, 2022
    Inventors: Yingchao Li, Dali Li
  • Publication number: 20220177529
    Abstract: The present invention relates to a fusion protein for enhancing gene editing and use thereof. In particular, the invention provides an enhanced fusion protein. The enhanced fusion proteins of the present invention can significantly increase gene editing efficiency in vivo or in vitro as compared to the wildtype gene editing protein.
    Type: Application
    Filed: March 18, 2020
    Publication date: June 9, 2022
    Applicant: BIORAY LABORATORIES INC.
    Inventors: Dali LI, Shuming YIN, Mei ZHANG, Xi CHEN, Xiaohui ZHANG, Liren WANG, Mingyao LIU
  • Publication number: 20220165813
    Abstract: Disclosed are a display panel, a manufacturing method thereof and display equipment. The display panel comprises a display area, the display area comprises a camera area and a peripheral area surrounding the camera area, the camera area is provided with a transparent first touch control structure, and the first touch control structure is arranged between a substrate and an organic luminescent layer.
    Type: Application
    Filed: June 20, 2021
    Publication date: May 26, 2022
    Inventors: Dali LI, Zerui ZHANG, Yong HU
  • Publication number: 20200347407
    Abstract: Provided are two split single-base gene editing systems. Intein-mediated split BE3, saKKH-BE3 and ABE7.10 are separately developed by using the existing protein structure information of spCas9 and saCas9 and splitting methods thereof, and have targeted gene mutation efficiency equivalent to that of unsplit BE3, saKKH-BE3 and ABE7.10 working system, thereby making possible package into an AAV for delivery.
    Type: Application
    Filed: December 18, 2018
    Publication date: November 5, 2020
    Inventors: Dali LI, Xiaohui ZHANG, Liren WANG, Biyun ZHU, Liang CHEN, Mingyao LIU
  • Patent number: 4908775
    Abstract: The present invention is a cycle monitoring system and method that acquires, logs and analyzes analog and/or digital signals from component sensors in a process control plant such as a nuclear power plant. The system continuously monitors the sensors and records steady-state and transient phenomena. Compression of the data is performed to reduce storage load. The compression ratio for transient data is driven by a threshold indicating a measurement signficant to stress determination. Transient data is retained at a higher sampling rate, so that the parameters of transient such as the maximum value can be determined for stress analysis. The stress analysis determines pressure and thermal stresses which are used to calculate a usage factor which indicates the stress age and thus the remaining life of a component. The system provides estimates of fatigue accumulation associated with selected locations of critical power plant components.
    Type: Grant
    Filed: February 24, 1987
    Date of Patent: March 13, 1990
    Assignee: Westinghouse Electric Corp.
    Inventors: Sam S. Palusamy, John C. Schmertz, Dali Li, John N. Chirigos, Charles B. Bond, Chuang Y. Yang