Patents by Inventor Dalibor Kladar

Dalibor Kladar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7307823
    Abstract: A surge suppressor module includes a power conductor, a ground conductor, and a housing including an opening and a plurality of dovetail groove mechanisms and arcuate ground bus bars for electrically and mechanically mounting a corresponding surge suppressor module. An alternating current surge suppressor circuit is housed by the housing. The circuit receives the power and ground conductors through the opening of the housing. The circuit electrically connects the ground conductor to the plurality of arcuate ground bus bars for electrically and mechanically mounting a corresponding surge suppressor module, in order to provide a common ground connection thereto.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: December 11, 2007
    Assignee: Eaton Corporation
    Inventors: Henryk J. Dabrowski, Anthony-Cernan Mendoza, James Funke, John D. Towler, Dalibor Kladar, Mieczyslaw Bandura, David J. Speidelsbach
  • Publication number: 20070201177
    Abstract: A number of surge protection device disconnector designs provide protection to a load over a full range of fault currents provide adequate surge protection as well. The designs quench arcs that may tend to occur as a result of MOV faults, thereby protecting the surrounding components.
    Type: Application
    Filed: February 27, 2006
    Publication date: August 30, 2007
    Inventors: Dalibor Kladar, Mieczyslaw Bandura, Henryk Dabrowski, James Funke, Francois Martzloff, John Towler, Anthony Mendoza, Thomas Hartman
  • Patent number: 6879478
    Abstract: A surge counter/detector apparatus includes current sensors communicating with power lines to sense a surge condition. A trigger circuit communicates with the current sensors and outputs a first signal in response to the sensed surge condition. The trigger circuit is reset and enabled by a second signal in order to enable subsequent output of the first signal. A processor detects the first signal from the trigger circuit and responsively increments and displays a count value at a display. The processor provides the second signal having a first state to reset the trigger circuit and a second state to enable the trigger circuit. The processor includes a timer to vary a time between (a) detecting the first signal, and (b) resetting and enabling the trigger circuit.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: April 12, 2005
    Assignee: Eaton Corporation
    Inventors: Anthony-Cernan Mendoza, Dalibor Kladar, James Funke, Chi Thuong Ha, Henryk Jan Dabrowski, Mieczyslaw Bandura
  • Publication number: 20040233605
    Abstract: A surge suppressor module includes a power conductor, a ground conductor, and a housing including an opening and a plurality of dovetail groove mechanisms and arcuate ground bus bars for electrically and mechanically mounting a corresponding surge suppressor module. An alternating current surge suppressor circuit is housed by the housing. The circuit receives the power and ground conductors through the opening of the housing. The circuit electrically connects the ground conductor to the plurality of arcuate ground bus bars for electrically and mechanically mounting a corresponding surge suppressor module, in order to provide a common ground connection thereto.
    Type: Application
    Filed: May 22, 2003
    Publication date: November 25, 2004
    Inventors: Henryk J. Dabrowski, Anthony-Cernan Mendoza, James Funke, John D. Towler, Dalibor Kladar, Mieczyslaw Bandura, David J. Speidelsbach
  • Patent number: 6748344
    Abstract: A meter includes an EEPROM storing a scaling factor; a divider providing a first analog voltage from an electrical system; an analog to digital converter (ADC) converting the first analog voltage to a first digital value; and a processor. The processor includes a first routine calculating the scaling factor; an input circuit for the first routine, and a second routine retrieving the scaling factor from the EEPROM and adding the scaling factor to the first digital value to provide a sum for a display. The first routine calculates the scaling factor by subtracting a second digital value from a larger third digital value, which represents a nominal voltage value. The second digital value is converted by the ADC from a second analog voltage from the divider, that receives a larger third analog voltage representing the nominal voltage value.
    Type: Grant
    Filed: April 29, 2002
    Date of Patent: June 8, 2004
    Assignee: Eaton Corporation
    Inventors: Anthony C. Mendoza, Chi T. Ha, James Funke, Dalibor Kladar, Henryk J. Dabrowski, Mieczyslaw Bandura, Mahmoud Ghanem
  • Publication number: 20040085696
    Abstract: A surge counter/detector apparatus includes current sensors communicating with power lines to sense a surge condition. A trigger circuit communicates with the current sensors and outputs a first signal in response to the sensed surge condition. The trigger circuit is reset and enabled by a second signal in order to enable subsequent output of the first signal. A processor detects the first signal from the trigger circuit and responsively increments and displays a count value at a display. The processor provides the second signal having a first state to reset the trigger circuit and a second state to enable the trigger circuit. The processor includes a timer to vary a time between (a) detecting the first signal, and (b) resetting and enabling the trigger circuit.
    Type: Application
    Filed: October 31, 2002
    Publication date: May 6, 2004
    Inventors: Anthony-Cernan Mendoza, Dalibor Kladar, James Funke, Chi Thuong Ha, Henryk Jan Dabrowski, Mieczyslaw Bandura
  • Publication number: 20030204339
    Abstract: A meter includes an EEPROM storing a scaling factor; a divider providing a first analog voltage from an electrical system; an analog to digital converter (ADC) converting the first analog voltage to a first digital value; and a processor. The processor includes a first routine calculating the scaling factor; an input circuit for the first routine, and a second routine retrieving the scaling factor from the EEPROM and adding the scaling factor to the first digital value to provide a sum for a display. The first routine calculates the scaling factor by subtracting a second digital value from a larger third digital value, which represents a nominal voltage value. The second digital value is converted by the ADC from a second analog voltage from the divider, that receives a larger third analog voltage representing the nominal voltage value.
    Type: Application
    Filed: April 29, 2002
    Publication date: October 30, 2003
    Inventors: Anthony C. Mendoza, Chi T. Ha, James Funke, Dalibor Kladar, Henryk J. Dabrowski, Mieczyslaw Bandura, Mahmoud Ghanem
  • Patent number: 6636409
    Abstract: A surge protection device includes terminals adapted to receive a power source voltage and surge protection circuits, each of which includes a thermal fuse spring, one or more metal oxide varistors (MOVs), and one or more fuse traces corresponding to the MOVs. The thermal fuse spring, one of the fuse traces and the corresponding one of the MOVs are electrically interconnected in series between the terminals, in order to form a series electrical connection therebetween. The thermal fuse spring is adapted to disconnect the series electrical connection between the terminals under first fault conditions including a first current of first duration through one of the MOVs. The thermal fuse spring and each of the fuse traces are adapted to cooperatively disconnect a corresponding one of the series electrical connections between the terminals under second fault conditions including a second greater current of second lesser duration through one of the MOVs.
    Type: Grant
    Filed: April 16, 2001
    Date of Patent: October 21, 2003
    Assignee: Eaton Corporation
    Inventors: Dalibor Kladar, James Funke, Chi Thuong Ha, Anthony-Cernan Mendoza, Mieczyslaw Bandura, Mahoud Ghanem
  • Publication number: 20020149899
    Abstract: A surge protection device includes terminals adapted to receive a power source voltage and surge protection circuits, each of which includes a thermal fuse spring, one or more metal oxide varistors (MOVs), and one or more fuse traces corresponding to the MOVs. The thermal fuse spring, one of the fuse traces and the corresponding one of the MOVs are electrically interconnected in series between the terminals, in order to form a series electrical connection therebetween. The thermal fuse spring is adapted to disconnect the series electrical connection between the terminals under first fault conditions including a first current of first duration through one of the MOVs. The thermal fuse spring and each of the fuse traces are adapted to cooperatively disconnect a corresponding one of the series electrical connections between the terminals under second fault conditions including a second greater current of second lesser duration through one of the MOVs.
    Type: Application
    Filed: April 16, 2001
    Publication date: October 17, 2002
    Inventors: Dalibor Kladar, James Funke, Chi Thuong Ha, Anthony-Cernan Mendoza, Mieczyslaw Bandura, Mahoud Ghanem
  • Patent number: 6226162
    Abstract: A surge suppression network for single and multiphase ac systems has a voltage clamping device connected in series with a gated crowbar device across the supply voltage in parallel with the load to be protected. A trigger circuit gates the crowbar device on in response to a specified rate of change of the supply voltage indicative of a surge. For higher levels of surge current shunting, pluralities of clamping devices and crowbar devices can be connected in parallel with a single trigger circuit simultaneously turning on all of the crowbar devices for each phase. For crowbar devices such as TRIACs with different response characteristics to positive and negative surges and for unipolar devices such as SCRs, positive and negative subnetworks are connected in anti-parallel across the load.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: May 1, 2001
    Assignee: Eaton Corporation
    Inventors: Dalibor Kladar, Chi Thuong Ha, Anthony Cernan Mendoza, James Funke