Patents by Inventor Dallas M. Barlow

Dallas M. Barlow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11657138
    Abstract: An example computing device includes a memory accessible at startup of the computing device, a buffer, and a set of instructions. The memory stores a configuration setting that is configurable by the application of a change request. The memory also stores a first public key and a second public key. The buffer stores change requests submitted by a remote entity, including a first change request to make a first setting change and a second change request to make a second setting change. The first change request is signed by a first private key corresponding to the first public key, and the second change request is signed by a second private key corresponding to the second public key. The set of instructions retrieves a change request from the buffer, determines whether the change request is authenticated by a public key, and if authenticated, applies the change request.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: May 23, 2023
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Richard Alden Bramley, Jr., Dallas M. Barlow, Patrick Lee Gibbons, Adrian John Baldwin, Tevin Jaupaul Richards, Robert Stephen Craig, Valiuddin Ali, Jeffrey Kevin Jeansonne
  • Publication number: 20230066447
    Abstract: In some examples, a computing device includes memory including system memory, and a processor in electronic communication with the memory. In some examples, the processor receives a system management interrupt. In some examples, the processor identifies trigger code that triggered the system management interrupt. In some examples, the processor executes code from the system memory when the trigger code is a virtualization program.
    Type: Application
    Filed: August 24, 2021
    Publication date: March 2, 2023
    Inventors: Richard Alden Bramley, JR., Dallas M. Barlow, Jeffrey Kevin Jeansonne
  • Patent number: 11537757
    Abstract: A computer system includes an independent compute core; and an isolated secure data storage device to store data accessible only to the independent compute core. The independent compute core is to open an Application Program Interface (API) during runtime of the computer system in response to receiving a verified message containing secure data to be written to the secure data storage device.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: December 27, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Dallas M Barlow, Stanley Hyojun Park, Christopher H Stewart, Baraneedharan Anbazhagan, Scott B Marcak, Richard A Bramley, Jr.
  • Publication number: 20210382979
    Abstract: An example computing device includes a memory accessible at startup of the computing device, a buffer, and a set of instructions. The memory stores a configuration setting that is configurable by the application of a change request. The memory also stores a first public key and a second public key. The buffer stores change requests submitted by a remote entity, including a first change request to make a first setting change and a second change request to make a second setting change. The first change request is signed by a first private key corresponding to the first public key, and the second change request is signed by a second private key corresponding to the second public key. The set of instructions retrieves a change request from the buffer, determines whether the change request is authenticated by a public key, and if authenticated, applies the change request.
    Type: Application
    Filed: February 28, 2019
    Publication date: December 9, 2021
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Richard Alden Bramley, Jr., Dallas M. Barlow, Patrick Lee Gibbons, Adrian John Baldwin, Tevin Jaupaul Richards, Robert Stephen Craig, Valiuddin Ali, Jeffrey Kevin Jeansonne
  • Patent number: 10296353
    Abstract: A method of protecting basic input/output system (BIOS) code. The method includes, with a relocation information tool executed by a processor, refactoring a number of data sections within a number of handlers of the BIOS code to tag a number of variables within the handlers. The tags indicate which of the variables should be protected at runtime. The method further includes generating a relocation file comprising a number of relocation addresses identifying locations of a number of dynamic variables that change at runtime. The relocation addresses point to a location within the handlers different from an original location. The method further includes, with a loader, loading at runtime the relocation file as part of a BIOS firmware image and adjusting data access to the dynamic variables in handler code to identify the location of the dynamic variables based on the relocation file.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: May 21, 2019
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Wei Ze Liu, Jeffrey Kevin Jeansonne, Dallas M Barlow
  • Patent number: 10268822
    Abstract: According to one example for verifying firmware module execution privilege, a firmware is booted on a processor. At least one firmware module in the firmware marked as a test module is identified, and verification with a production public key of metadata associated with the firmware is attempted. In an example, in the event that the metadata verifies successfully with the production public key, the firmware boot is halted when the processor determines that access to a video interface is available, and a user is alerted that a test module has attempted execution in a production firmware.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: April 23, 2019
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Christopher H Stewart, Venkatesh Yarraguntla, Dallas M Barlow
  • Patent number: 10181956
    Abstract: Example implementations relate to key revocation. For example, a system for key revocation may comprise a processor, an embedded controller, a non-volatile memory storing a system instruction signing key authorization data element, wherein the data element includes a system instruction signing key, a signing key number and a signature. The embedded controller may include a plurality of keys to verify the data element, and a one-time programmable (OTP) memory and a key among the plurality of keys that is revocable using the OTP memory, wherein revocation of the key permanently prevents the embedded controller from utilizing the key.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: January 15, 2019
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey K. Jeansonne, Lan Wang, Dallas M. Barlow
  • Publication number: 20180373900
    Abstract: A computer system includes an independent compute core; and an isolated secure data storage device to store data accessible only to the independent compute core. The independent compute core is to open an Application Program Interface (API) during runtime of the computer system in response to receiving a verified message containing secure data to be written to the secure data storage device.
    Type: Application
    Filed: February 19, 2016
    Publication date: December 27, 2018
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Dallas M Barlow, Stanley Hyojun Park, Christopher H Stewart, Baraneedharan Anbazhagan, Scott B Marcak, Richard A Bramley, JR.
  • Publication number: 20180321947
    Abstract: A method of protecting basic input/output system (BIOS) code. The method includes, with a relocation information tool executed by a processor, refactoring a number of data sections within a number of handlers of the BIOS code to tag a number of variables within the handlers. The tags indicate which of the variables should be protected at runtime. The method further includes generating a relocation file comprising a number of relocation addresses identifying locations of a number of dynamic variables that change at runtime. The relocation addresses point to a location within the handlers different from an original location. The method further includes, with a loader, loading at runtime the relocation file as part of a BIOS firmware image and adjusting data access to the dynamic variables in handler code to identify the location of the dynamic variables based on the relocation file.
    Type: Application
    Filed: January 25, 2016
    Publication date: November 8, 2018
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Wei Ze LIU, Jeffrey Kevin JEANSONNE, Dallas M BARLOW
  • Publication number: 20180239900
    Abstract: According to one example for verifying firmware module execution privilege, a firmware is booted on a processor. At least one firmware module in the firmware marked as a twit module is identified, and verification with a production public key of metadata associated with the firmware is attempted. In an example, in the event that the metadata verifies successfully with the production public key, the firmware boot is halted when the processor determines that access to a video interface is available, and a user is alerted dial a test module has attempted execution in n production firmware.
    Type: Application
    Filed: December 1, 2014
    Publication date: August 23, 2018
    Inventors: Christopher H STEWART, Venkatesh GUNTLA, Dallas M BARLOW
  • Publication number: 20180226136
    Abstract: Example implementations relate to system management mode (SMM) test operations. For example, a system for SMM test operations may include a test mode initiation engine to reboot a computing device, and load an interface firmware engine into system management random access memory (SMRAM) associated with the computing device in response to the reboot, wherein the interface firmware engine includes a production interface firmware engine to perform the test operation on a known address space of the page of SMRAM. The system may include a test operation engine to cause the computing system to operate in a testing mode, wherein the testing mode includes operating the computing system in system management mode (SMM), in response to a test command, and perform a test operation on a page of system management random access memory (SMRAM) associated with the computing device when the computing device is operating in SMM.
    Type: Application
    Filed: January 27, 2016
    Publication date: August 9, 2018
    Inventors: Jeffrey Kevin JEANSONNE, Dallas M. BARLOW, Richard A. BRAMLEY, Jr., David PLAQUIN, Maugan VILLATEL
  • Publication number: 20170180139
    Abstract: Example implementations relate to key revocation. For example, a system for key revocation may comprise a processor, an embedded controller, a non-volatile memory storing a system instruction signing key authorization data element, wherein the data element includes a system instruction signing key, a signing key number and a signature. The embedded controller may include a plurality of keys to verify the data element, and a one-time programmable (OTP) memory and a key among the plurality of keys that is revocable using the OTP memory, wherein revocation of the key permanently prevents the embedded controller from utilizing the key.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 22, 2017
    Inventors: Jeffrey K. Jeansonne, Lan Wang, Dallas M. Barlow
  • Patent number: 8959255
    Abstract: A computer protection system comprises a mobile detection module adapted to detect at least one event indicating a likelihood of movement of a computer and, in response to detecting the at least one event, automatically place a drive device of the computer in a suspend state.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: February 17, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Richard S. Lin, Monji G. Jabori, Dallas M. Barlow
  • Patent number: 8949638
    Abstract: Example embodiments disclosed herein relate to a computing system including a controller hub to control system sleep states, and an embedded controller including an internal timer. The embedded controller is to remove power from the controller hub when the system enters a sleep state and to enable power to the controller hub prior to the system wake time. The internal timer is to determine when to enable power to the controller hub. Example methods and machine-readable storage media are also disclosed.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: February 3, 2015
    Assignee: Hewlwtt-Packard Development Company, L.P.
    Inventors: Dallas M Barlow, Jon G Lloyd
  • Publication number: 20130290757
    Abstract: Example embodiments disclosed herein relate to a computing system including a controller hub to control system sleep states, and an embedded controller including an internal timer. The embedded controller is to remove power from the controller hub when the system enters a sleep state and to enable power to the controller hub prior to the system wake time, The internal timer is to determine when to enable power to the controller hub. Example methods and machine-readable storage media are also disclosed.
    Type: Application
    Filed: April 25, 2012
    Publication date: October 31, 2013
    Inventors: Dallas M. Barlow, Jon G. Lloyd
  • Patent number: 7689851
    Abstract: One embodiment is a computer device that uses a timer to limit a quantity of changes to different power states that are performed on a processor in the computer device during a predetermined time period. The power states changes each have different operating frequencies for the processor.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: March 30, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Thomas P. Sawyers, Dallas M. Barlow
  • Patent number: 7644222
    Abstract: A low latency event communication system comprises a computer system having an Advanced Configuration and Power Interface (ACPI) namespace table with a Peripheral Component Interconnect (PCI) branch and a non-PCI device described in the PCI branch to enable the non-PCI device to be assigned a PCI resource.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: January 5, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey Kevin Jeansonne, Dallas M. Barlow
  • Publication number: 20080104303
    Abstract: A low latency event communication system comprises a computer system having an Advanced Configuration and Power Interface (ACPI) namespace table with a Peripheral Component Interconnect (PCI) branch and a non-PCI device described in the PCI branch to enable the non-PCI device to be assigned a PCI resource.
    Type: Application
    Filed: October 25, 2006
    Publication date: May 1, 2008
    Inventors: Jeffrey Kevin Jeansonne, Dallas M. Barlow
  • Publication number: 20080104436
    Abstract: A computer device power management system comprises a controller configured to throttle a processor of a computer device responsive to an overcurrent condition associated with a power source powering the computer device, the controller configured to adjust a power state of the processor to at least one of a plurality of predetermined power states based on a level of the throttle.
    Type: Application
    Filed: October 27, 2006
    Publication date: May 1, 2008
    Inventors: Thomas P. Sawyers, Dallas M. Barlow
  • Publication number: 20040070371
    Abstract: A battery operated computer system implements a power management scheme based on battery behavior. The battery behavior that is monitored as part of the power management scheme may include battery temperature, current, voltage, and/or capacity. In response to one or more of these battery parameters exceeding a threshold, the computer transitions itself to a lower power consumption mode. In so doing, the potential for the battery to shut itself off due to being over-extended (e.g., over current) is reduced.
    Type: Application
    Filed: October 11, 2002
    Publication date: April 15, 2004
    Applicant: Compaq Information Technologies Group, L.P.
    Inventors: Lih Chern, Lee W. Atkinson, David J. DeLisle, Richard S. Lin, Dallas M. Barlow