Patents by Inventor Damian Costa

Damian Costa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11846660
    Abstract: A power detector with wide dynamic range. The power detector includes a linear detector, followed by a voltage-to-current-to-voltage converter, which is then followed by an amplification stage. The current-to-voltage conversion in the converter is performed logarithmically. The power detector generates a desired linear-in-dB response at the output. In this power detector, the distribution of gain along the signal path is optimized in order to preserve linearity, and to minimize the impact of offset voltage inherently present in electronic blocks, which would corrupt the output voltage. Further, the topologies in the sub-blocks are designed to provide wide dynamic range, and to mitigate error sources. Moreover, the temperature sensitivity is designed out by either minimizing temperature variation of an individual block such as the v-i-v detector, or using two sub-blocks in tandem to provide overall temperature compensation.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: December 19, 2023
    Assignee: pSemi Corporation
    Inventors: Damian Costa, Chih-Chieh Cheng, Christopher C Murphy, Tero Tapio Ranta
  • Publication number: 20220390493
    Abstract: A power detector with wide dynamic range. The power detector includes a linear detector, followed by a voltage-to-current-to-voltage converter, which is then followed by an amplification stage. The current-to-voltage conversion in the converter is performed logarithmically. The power detector generates a desired linear-in-dB response at the output. In this power detector, the distribution of gain along the signal path is optimized in order to preserve linearity, and to minimize the impact of offset voltage inherently present in electronic blocks, which would corrupt the output voltage. Further, the topologies in the sub-blocks are designed to provide wide dynamic range, and to mitigate error sources. Moreover, the temperature sensitivity is designed out by either minimizing temperature variation of an individual block such as the v-i-v detector, or using two sub-blocks in tandem to provide overall temperature compensation.
    Type: Application
    Filed: June 21, 2022
    Publication date: December 8, 2022
    Inventors: Damian Costa, Chih-Chieh Cheng, Christopher C. Murphy, Tero Tapio Ranta
  • Patent number: 11385267
    Abstract: A power detector with wide dynamic range. The power detector includes a linear detector, followed by a voltage-to-current-to-voltage converter, which is then followed by an amplification stage. The current-to-voltage conversion in the converter is performed logarithmically. The power detector generates a desired linear-in-dB response at the output. In this power detector, the distribution of gain along the signal path is optimized in order to preserve linearity, and to minimize the impact of offset voltage inherently present in electronic blocks, which would corrupt the output voltage. Further, the topologies in the sub-blocks are designed to provide wide dynamic range, and to mitigate error sources. Moreover, the temperature sensitivity is designed out by either minimizing temperature variation of an individual block such as the v-i-v detector, or using two sub-blocks in tandem to provide overall temperature compensation.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: July 12, 2022
    Assignee: pSemi Corporation
    Inventors: Damian Costa, Chih-Chieh Cheng, Christopher C. Murphy, Tero Tapio Ranta
  • Publication number: 20200264217
    Abstract: A power detector with wide dynamic range. The power detector includes a linear detector, followed by a voltage-to-current-to-voltage converter, which is then followed by an amplification stage. The current-to-voltage conversion in the converter is performed logarithmically. The power detector generates a desired linear-in-dB response at the output. In this power detector, the distribution of gain along the signal path is optimized in order to preserve linearity, and to minimize the impact of offset voltage inherently present in electronic blocks, which would corrupt the output voltage. Further, the topologies in the sub-blocks are designed to provide wide dynamic range, and to mitigate error sources. Moreover, the temperature sensitivity is designed out by either minimizing temperature variation of an individual block such as the v-i-v detector, or using two sub-blocks in tandem to provide overall temperature compensation.
    Type: Application
    Filed: February 14, 2019
    Publication date: August 20, 2020
    Inventors: Damian Costa, Chih-Chieh Cheng, Christopher C. Murphy, Tero Tapio Ranta
  • Patent number: 10587229
    Abstract: Methods and devices for providing a feedback network in a multi-stage power amplifier are described. According to one aspect, a final amplifier of the multi-stage power amplifier is a cascode amplifier. The feedback network is placed between an output of the final amplifier and an output of a driver amplifier. The feedback network can decrease a mismatch between the output impedance of the final amplifier and a load presented to the final amplifier. In addition, the feedback network can change a load presented to the driver amplifier and thereby allow the transfer functions of each stage to be tuned so that the overall transfer function of the multi-stage amplifier becomes more linear.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: March 10, 2020
    Assignee: pSemi Corporation
    Inventors: Damian Costa, Chih-Chieh Cheng, Tero Tapio Ranta
  • Patent number: 10439564
    Abstract: Methods and devices for improving AM-AM and AM-PM performance of an RF amplifier are presented. According to one aspect, input and output harmonic terminations coupled to the input and output of the amplifier are tuned at frequencies near to, but different than, a second harmonic frequency of an RF signal to be amplified. Improved AM-AM and AM-PM performance is obtained when i) the input harmonic termination is tuned at a frequency that is below the second harmonic frequency and the output harmonic termination is tuned at a frequency that is above the second harmonic frequency, and ii) the input harmonic termination is tuned at a frequency that is farther away from the second harmonic frequency than the frequency used for tuning of the output harmonic termination.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: October 8, 2019
    Assignee: pSemi Corporation
    Inventors: Damian Costa, Chih-Chieh Cheng, Richard B. Whatley, Tero Tapio Ranta
  • Publication number: 20190305733
    Abstract: Methods and devices for improving AM-AM and AM-PM performance of an RF amplifier are presented. According to one aspect, input and output harmonic terminations coupled to the input and output of the amplifier are tuned at frequencies near to, but different than, a second harmonic frequency of an RF signal to be amplified. Improved AM-AM and AM-PM performance is obtained when i) the input harmonic termination is tuned at a frequency that is below the second harmonic frequency and the output harmonic termination is tuned at a frequency that is above the second harmonic frequency, and ii) the input harmonic termination is tuned at a frequency that is farther away from the second harmonic frequency than the frequency used for tuning of the output harmonic termination.
    Type: Application
    Filed: March 30, 2018
    Publication date: October 3, 2019
    Inventors: Damian Costa, Chih-Chieh Cheng, Richard B. Whatley, Tero Tapio Ranta
  • Patent number: 9397635
    Abstract: A method and circuit for significantly reducing the switching transients of a digital step attenuator (DSA) by employing a segmented architecture that combines thermometer and binary coded stages. This approach reduces the number of attenuator stages switching at the same time and thus minimizes any glitch amplitude. Embodiments of a segmented DSA may be realized with “pi” and “bridged-T” attenuators, as well as with simple tuned L-pad attenuators combined in a resistor ladder network.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: July 19, 2016
    Assignee: Peregrine Semiconductor Corporation
    Inventor: Damian Costa
  • Publication number: 20150137913
    Abstract: A method and circuit for significantly reducing the switching transients of a digital step attenuator (DSA) by employing a segmented architecture that combines thermometer and binary coded stages. This approach reduces the number of attenuator stages switching at the same time and thus minimizes any glitch amplitude. Embodiments of a segmented DSA may be realized with “pi” and “bridged-T” attenuators, as well as with simple tuned L-pad attenuators combined in a resistor ladder network.
    Type: Application
    Filed: November 19, 2013
    Publication date: May 21, 2015
    Applicant: PEREGRINE SEMICONDUCTOR CORPORATION
    Inventor: Damian Costa
  • Patent number: 8107914
    Abstract: Radio-frequency (RF) circuits, methods and systems are implemented according to a variety of embodiments. According to one such embodiment, a radio-frequency (RF) receiver circuit is implemented with an adjustable RF filter circuit in a receive path of the RF receiver circuit. A local oscillator (LO) generates a LO signal and an RX_LO signal from the LO signal. A mixing circuit mixes a signal received from the adjustable RF filter circuit and the RX_LO signal. An intermediate-frequency (IF) circuit generates an IF_cal signal at the receiver circuit. A calibration circuit implements both a calibration mode and a receive mode. In the calibration mode, a calibration signal is injected into the receive path. A setting of the adjustable RF filter circuit is determined. In the receive mode, the calibration circuit disables the injection of the calibration signal into the receive path of the RF receiver circuit.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: January 31, 2012
    Inventors: Daniel Firoiu, Damian Costa, Mats Lindstrom, Kendal McNaught-Davis Hess, Weinen Gao
  • Patent number: 7974374
    Abstract: Systems for multi-mode phase modulation are disclosed. Systems provide for direct modulation of a multi-mode voltage controlled oscillator (VCO). A fractional-N counter may be used in a phase-locked loop (PLL) to synthesize a radio frequency carrier signal. The multi-mode VCO may be characterized by a first frequency gain during operation in a first mode and by a second frequency gain during operation in a second mode where signals controlling the first and second operating modes are provided by a control circuit. The control circuit may include a switch to provide control signals to the VCO.
    Type: Grant
    Filed: May 16, 2007
    Date of Patent: July 5, 2011
    Assignee: Quintic Holdings
    Inventors: John B. Groe, Joe Austin, Damian Costa
  • Patent number: 7778618
    Abstract: Systems for suppressing image noise are provided. In this regard, one embodiment includes a system for suppressing image noise comprising a low noise amplifier (LNA) configured to amplify a received RF signal, an RF variable gain attenuator with an image rejection filter with programmable bandwidth configured to suppress image noise and image interference, and an RF mixer configured to perform frequency translation.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: August 17, 2010
    Assignee: Conexant Systems, Inc.
    Inventors: Jianhua Lu, Mark Santini, Weinan Gao, Mats Lindstrom, Damian Costa
  • Publication number: 20100151806
    Abstract: Radio-frequency (RF) circuits, methods and systems are implemented according to a variety of embodiments. According to one such embodiment, a radio-frequency (RF) receiver circuit is implemented with an adjustable RF filter circuit in a receive path of the RF receiver circuit. A local oscillator (LO) generates a LO signal and an RX_LO signal from the LO signal. A mixing circuit mixes a signal received from the adjustable RF filter circuit and the RX_LO signal. An intermediate-frequency (IF) circuit generates an IF_cal signal at the receiver circuit. A calibration circuit implements both a calibration mode and a receive mode. In the calibration mode, a calibration signal is injected into the receive path. A setting of the adjustable RF filter circuit is determined. In the receive mode, the calibration circuit disables the injection of the calibration signal into the receive path of the RF receiver circuit.
    Type: Application
    Filed: December 16, 2008
    Publication date: June 17, 2010
    Applicant: NXP B.V.
    Inventors: Daniel Firoiu, Damian Costa, Mats Lindstrom, Kendal McNaught-Davis Hess, Weinen Gao
  • Patent number: 7496338
    Abstract: Multi-segment gain control system. Apparatus is provided for a multi-segment gain control. The apparatus includes logic to convert a gain control signal to an exponential signal, and logic to map the exponential signal to multiple control signals that are used to control multiple gain stages to produce linear multi-segment gain control.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: February 24, 2009
    Assignee: Sequoia Communications
    Inventors: John Groe, Naone Farias, Damian Costa, Babak Nejati
  • Patent number: 7489916
    Abstract: Direct down-conversion mixer. A direct down-conversion mixer is provided. The mixer comprises an LO switching pair coupled to receive an RF input signal and produce a down converted output signal. The mixer also comprises an integrator coupled to receive the output signal and produce an integrator output signal. The mixer also comprises a control circuit coupled to receive an input voltage and the integrator output signal to produce a control signal that is coupled to the LO switching pair.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: February 10, 2009
    Assignee: Sequoia Communications
    Inventors: Michael Farias, John Groe, Damian Costa
  • Patent number: 7463097
    Abstract: Systems involving temperature compensation of voltage controlled oscillators are provided. In this regard, a representative system incorporates: a voltage controlled oscillator (VCO) having a tuning port and a phase-locked loop (PLL); and a temperature dependent voltage source. The VCO selectively exhibits one of a coarse tuning mode in which the temperature dependent voltage source is electrically connected to the VCO tuning port, and a locked mode in which the temperature dependent voltage source is not electrically connected to the VCO tuning port such that the PLL controls the frequency of the VCO.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: December 9, 2008
    Assignee: NXP B.V.
    Inventors: Damian Costa, William James Huff
  • Publication number: 20080160946
    Abstract: Systems for suppressing image noise are provided. In this regard, one embodiment includes a system for suppressing image noise comprising a low noise amplifier (LNA) configured to amplify a received RF signal, an RF variable gain attenuator with an image rejection filter with programmable bandwidth configured to suppress image noise and image interference, and an RF mixer configured to perform frequency translation.
    Type: Application
    Filed: December 28, 2006
    Publication date: July 3, 2008
    Applicant: CONEXANT SYSTEMS, INC.
    Inventors: Jianhua Lu, Mark Santini, Weinan Gao, Mats Lindstrom, Damian Costa
  • Publication number: 20080150641
    Abstract: Systems involving temperature compensation of voltage controlled oscillators are provided. In this regard, a representative system incorporates: a voltage controlled oscillator (VCO) having a tuning port and a phase-locked loop (PLL); and a temperature dependent voltage source. The VCO selectively exhibits one of a coarse tuning mode in which the temperature dependent voltage source is electrically connected to the VCO tuning port, and a locked mode in which the temperature dependent voltage source is not electrically connected to the VCO tuning port such that the PLL controls the frequency of the VCO.
    Type: Application
    Filed: December 20, 2006
    Publication date: June 26, 2008
    Applicant: CONEXANT SYSTEMS, INC.
    Inventors: Damian Costa, William James Huff
  • Publication number: 20070291889
    Abstract: Systems for multi-mode phase modulation are disclosed. Systems provide for direct modulation of a multi-mode voltage controlled oscillator (VCO). A fractional-N counter may be used in a phase-locked loop (PLL) to synthesize a radio frequency carrier signal. The multi-mode VCO may be characterized by a first frequency gain during operation in a first mode and by a second frequency gain during operation in a second mode where signals controlling the first and second operating modes are provided by a control circuit. The control circuit may include a switch to provide control signals to the VCO.
    Type: Application
    Filed: May 16, 2007
    Publication date: December 20, 2007
    Applicant: SEQUOIA COMMUNICATIONS
    Inventors: John Groe, Joe Austin, Damian Costa
  • Patent number: 7164318
    Abstract: Continuous variable-gain low-noise amplifier. The amplifier continuously adjusts its gain between well-defined high and low values by using a cascode current-steering circuit to partition signal current between two different nodes of an output loading network. A shunt feedback network connected from an intermediate node of the loading network to the input provides negative feedback that linearizes the amplifier as its gain is decreased. The circuit degrades the noise figure at lower gains by varying the gain without directly dumping the signal current to the power supply. The circuit produces only small changes in input and output impedances and preserves an improved reverse-isolation cascode characteristic as the gain is controlled.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: January 16, 2007
    Assignee: Sequoia Communications
    Inventors: Damian Costa, Joseph Austin, John Groe, Michael Farias