Patents by Inventor Damian Sojka
Damian Sojka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9543208Abstract: In accordance with an embodiment of the present invention, a method for forming a semiconductor device includes forming a device region in a substrate. The device region extends continuously from one sidewall of the substrate to an opposite sidewall of the substrate. The method further includes forming trenches in the substrate. The trenches divide the device region into active regions. The method also includes singulating the substrate by separating the substrate along the trenches.Type: GrantFiled: February 24, 2014Date of Patent: January 10, 2017Assignee: Infineon Technologies AGInventors: Andre Schmenn, Damian Sojka, Isabella Goetz
-
Patent number: 9524940Abstract: According to various embodiments, a method for manufacturing a semiconductor device may include providing a semiconductor workpiece including a device region at a first side of the semiconductor workpiece, wherein a mechanical stability of the semiconductor workpiece is insufficient to resist at least one back end process without damage, and depositing at least one conductive layer over a second side of the semiconductor workpiece opposite the first side of the semiconductor workpiece, wherein the at least one conductive layer increases the mechanical stability of the semiconductor workpiece to be sufficient to resist the at least one back end process without damage.Type: GrantFiled: January 22, 2016Date of Patent: December 20, 2016Assignee: INFINEON TECHNOLOGIES AGInventors: Thomas Fischer, Carsten Ahrens, Damian Sojka, Andre Schmenn
-
Patent number: 9515177Abstract: A vertically integrated semiconductor device in accordance with various embodiments may include: a first semiconducting layer; a second semiconducting layer disposed over the first semiconducting layer; a third semiconducting layer disposed over the second semiconducting layer; and an electrical bypass coupled between the first semiconducting layer and the second semiconducting layer.Type: GrantFiled: November 25, 2014Date of Patent: December 6, 2016Assignee: INFINEON TECHNOLOGIES AGInventors: Andre Schmenn, Damian Sojka
-
Publication number: 20160300827Abstract: A semiconductor device includes a vertical protection device having a thyristor and a lateral trigger element disposed in a substrate. The lateral trigger element is for triggering the vertical protection device.Type: ApplicationFiled: August 4, 2015Publication date: October 13, 2016Inventors: Vadim Valentinovic Vendt, Joost Willemen, Andre Schmenn, Damian Sojka
-
Patent number: 9437589Abstract: In accordance with an embodiment of the present invention, a semiconductor package includes a die paddle and a protection device disposed over the die paddle. The protection device includes a first heat generating zone disposed in a substrate. The first heat generating zone is disposed at a first side facing the die paddle. A solder layer at the first heat generating zone joins the protection device with the die paddle.Type: GrantFiled: March 25, 2014Date of Patent: September 6, 2016Assignee: Infineon Technologies AGInventors: Josef Dietl, Andre Schmenn, Damian Sojka
-
Publication number: 20160149021Abstract: A vertically integrated semiconductor device in accordance with various embodiments may include: a first semiconducting layer; a second semiconducting layer disposed over the first semiconducting layer; a third semiconducting layer disposed over the second semiconducting layer; and an electrical bypass coupled between the first semiconducting layer and the second semiconducting layer.Type: ApplicationFiled: November 25, 2014Publication date: May 26, 2016Inventors: Andre Schmenn, Damian Sojka
-
Publication number: 20160141256Abstract: According to various embodiments, a method for manufacturing a semiconductor device may include providing a semiconductor workpiece including a device region at a first side of the semiconductor workpiece, wherein a mechanical stability of the semiconductor workpiece is insufficient to resist at least one back end process without damage, and depositing at least one conductive layer over a second side of the semiconductor workpiece opposite the first side of the semiconductor workpiece, wherein the at least one conductive layer increases the mechanical stability of the semiconductor workpiece to be sufficient to resist the at least one back end process without damage.Type: ApplicationFiled: January 22, 2016Publication date: May 19, 2016Inventors: Thomas Fischer, Carsten Ahrens, Damian Sojka, Andre Schmenn
-
Patent number: 9293409Abstract: According to various embodiments, a method for manufacturing a semiconductor device may include providing a semiconductor workpiece including a device region at a first side of the semiconductor workpiece, wherein a mechanical stability of the semiconductor workpiece is insufficient to resist at least one back end process without damage, and depositing at least one conductive layer over a second side of the semiconductor workpiece opposite the first side of the semiconductor workpiece, wherein the at least one conductive layer increases the mechanical stability of the semiconductor workpiece to be sufficient to resist the at least one back end process without damage.Type: GrantFiled: September 11, 2013Date of Patent: March 22, 2016Assignee: INFINEON TECHNOLOGIES AGInventors: Thomas Fischer, Carsten Ahrens, Damian Sojka, Andre Schmenn
-
Patent number: 9196568Abstract: An arrangement is provided. The arrangement may include: a die including at least one electronic component and a first terminal on a first side of the die and a second terminal on a second side of the die opposite the first side, wherein the first side being the main processing side of the die, and the die further including at least a third terminal on the second side; a first electrically conductive structure providing current flow from the third terminal on second side of the die to the first side through the die; a second electrically conductive structure on the first side of the die laterally coupling the second terminal with the first electrically conductive structure; and an encapsulation material disposed at least over the first side of the die covering the first terminal and the second electrically conductive structure.Type: GrantFiled: October 1, 2013Date of Patent: November 24, 2015Assignee: INFINEON TECHNOLOGIES AGInventors: Thomas Fischer, Carsten Ahrens, Damian Sojka, Andre Schmenn, Edward Fuergut
-
Patent number: 9177950Abstract: Described herein is a protective structure. The protective structure includes a semiconductor substrate, a first diode disposed at least one of in or on the semiconductor substrate and a diode arrangement disposed at least one of in or on the semiconductor substrate. The diode arrangement includes a stack of a second diode and a transient voltage suppressor (TVS) diode connected in series with the second diode. The diode arrangement is in parallel with the first diode.Type: GrantFiled: December 11, 2014Date of Patent: November 3, 2015Assignee: INFINEON TECHNOLOGIES AGInventors: Andre Schmenn, Damian Sojka, Carsten Ahrens
-
Publication number: 20150279833Abstract: In accordance with an embodiment of the present invention, a semiconductor package includes a die paddle and a protection device disposed over the die paddle. The protection device includes a first heat generating zone disposed in a substrate. The first heat generating zone is disposed at a first side facing the die paddle. A solder layer at the first heat generating zone joins the protection device with the die paddle.Type: ApplicationFiled: March 25, 2014Publication date: October 1, 2015Inventors: Josef Dietl, Andre Schmenn, Damian Sojka
-
Publication number: 20150243561Abstract: In accordance with an embodiment of the present invention, a method for forming a semiconductor device includes forming a device region in a substrate. The device region extends continuously from one sidewall of the substrate to an opposite sidewall of the substrate. The method further includes forming trenches in the substrate. The trenches divide the device region into active regions. The method also includes singulating the substrate by separating the substrate along the trenches.Type: ApplicationFiled: February 24, 2014Publication date: August 27, 2015Applicant: Infineon Technologies AGInventors: Andre Schmenn, Damian Sojka, Isabella Goetz
-
Publication number: 20150221523Abstract: An arrangement is provided. The arrangement may include: a substrate having a front side and a back side, a die region within the substrate, a multi-purpose layer defining a back side of the die region, and an etch stop layer disposed over the multi-purpose layer between the multi-purpose layer and the back side of the substrate. The multi-purpose layer may be formed of an ohmic material, and the etch stop layer may be of a first conductivity type of a first doping concentration.Type: ApplicationFiled: January 16, 2015Publication date: August 6, 2015Inventors: Markus Zundel, Andre Schmenn, Damian Sojka, Isabella Goetz, Gudrun Stranzl, Sebastian Werner, Thomas Fischer, Carsten Ahrens, Edward Fuergut
-
Publication number: 20150137305Abstract: Described herein is a protective structure. The protective structure includes a semiconductor substrate, a first diode disposed at least one of in or on the semiconductor substrate and a diode arrangement disposed at least one of in or on the semiconductor substrate. The diode arrangement includes a stack of a second diode and a transient voltage suppressor (TVS) diode connected in series with the second diode. The diode arrangement is in parallel with the first diode.Type: ApplicationFiled: December 11, 2014Publication date: May 21, 2015Inventors: Andre Schmenn, Damian Sojka, Carsten Ahrens
-
Publication number: 20150091183Abstract: An arrangement is provided. The arrangement may include: a die including at least one electronic component and a first terminal on a first side of the die and a second terminal on a second side of the die opposite the first side, wherein the first side being the main processing side of the die, and the die further including at least a third terminal on the second side; a first electrically conductive structure providing current flow from the third terminal on second side of the die to the first side through the die; a second electrically conductive structure on the first side of the die laterally coupling the second terminal with the first electrically conductive structure; and an encapsulation material disposed at least over the first side of the die covering the first terminal and the second electrically conductive structure.Type: ApplicationFiled: October 1, 2013Publication date: April 2, 2015Applicant: Infineon Technologies AGInventors: Thomas Fischer, Carsten Ahrens, Damian Sojka, Andre Schmenn, Edward Fuergut
-
Publication number: 20150069591Abstract: According to various embodiments, a method for manufacturing a semiconductor device may include providing a semiconductor workpiece including a device region at a first side of the semiconductor workpiece, wherein a mechanical stability of the semiconductor workpiece is insufficient to resist at least one back end process without damage, and depositing at least one conductive layer over a second side of the semiconductor workpiece opposite the first side of the semiconductor workpiece, wherein the at least one conductive layer increases the mechanical stability of the semiconductor workpiece to be sufficient to resist the at least one back end process without damage.Type: ApplicationFiled: September 11, 2013Publication date: March 12, 2015Applicant: Infineon Technologies AGInventors: Thomas Fischer, Carsten Ahrens, Damian Sojka, Andre Schmenn
-
Patent number: 8951879Abstract: A method for producing a protective structure may include: providing a semiconductor base substrate with a doping of a first conductivity type; producing a first epitaxial layer on the substrate; implanting a dopant of a second conductivity type in a delimited implantation region of the first epitaxial layer; applying a second epitaxial layer with a doping of the second conductivity type on the first epitaxial layer; forming an insulation zone in the second epitaxial layer, such that the second epitaxial layer is subdivided into first and second regions; producing a first dopant zone with a doping of the first conductivity type in the first region above the implantation region; producing a second dopant zone with a doping of the second conductivity type in the second region; outdiffusing the dopant from the implantation region to form a buried layer at the junction between the first epitaxial layer and the first region.Type: GrantFiled: April 24, 2014Date of Patent: February 10, 2015Assignee: Infineon Technologies AGInventors: Andre Schmenn, Damian Sojka, Carsten Ahrens
-
Publication number: 20140235039Abstract: A method for producing a protective structure may include: providing a semiconductor base substrate with a doping of a first conductivity type; producing a first epitaxial layer on the substrate; implanting a dopant of a second conductivity type in a delimited implantation region of the first epitaxial layer; applying a second epitaxial layer with a doping of the second conductivity type on the first epitaxial layer; forming an insulation zone in the second epitaxial layer, such that the second epitaxial layer is subdivided into first and second regions; producing a first dopant zone with a doping of the first conductivity type in the first region above the implantation region; producing a second dopant zone with a doping of the second conductivity type in the second region; outdiffusing the dopant from the implantation region to form a buried layer at the junction between the first epitaxial layer and the first region.Type: ApplicationFiled: April 24, 2014Publication date: August 21, 2014Applicant: Infineon Technologies AGInventors: Andre Schmenn, Damian Sojka, Carsten Ahrens
-
Patent number: 8766415Abstract: A protective structure may include: a semiconductor substrate having a doping of a first conductivity type; a semiconductor layer having a doping of a second conductivity type arranged at a surface of the semiconductor substrate; a buried layer having a doping of the second conductivity type arranged in a first region of the semiconductor layer and at the junction between the semiconductor layer and the semiconductor substrate; a first dopant zone having a doping of the first conductivity type arranged in the first region of the semiconductor layer above the buried layer; a second dopant zone having a doping of the second conductivity type arranged in a second region of the semiconductor layer; an electrical insulation arranged between the first region and the second region of the semiconductor layer; and a common connection device for the first dopant zone and the second dopant zone.Type: GrantFiled: August 28, 2013Date of Patent: July 1, 2014Assignee: Infineon Technologies AGInventors: Andre Schmenn, Damian Sojka, Carsten Ahrens
-
Publication number: 20140028192Abstract: In one embodiment of the present invention, an electronic device includes a first emitter/collector region and a second emitter/collector region disposed in a substrate. The first emitter/collector region has a first edge/tip, and the second emitter/collector region has a second edge/tip. A gap separates the first edge/tip from the second edge/tip. The first emitter/collector region, the second emitter/collector region, and the gap form a field emission device.Type: ApplicationFiled: July 25, 2012Publication date: January 30, 2014Applicant: INFINEON TECHNOLOGIES AGInventors: Alfons Dehe, Damian Sojka, Andre Schmenn, Carsten Ahrens