Patents by Inventor Damien RADISSON

Damien RADISSON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12033854
    Abstract: A method for producing a composite silicon carbide structure comprises: providing an initial substrate of monocrystalline silicon carbide; depositing an intermediate layer of polycrystalline silicon carbide at a temperature higher than 1000° C. on the initial substrate, the intermediate layer having a thickness greater than or equal to 1.5 microns; implanting light ionic species through the intermediate layer to form a buried brittle plane in the initial substrate, delimiting the thin layer between the buried brittle plane and the intermediate layer, and depositing an additional layer of polycrystalline silicon carbide at a temperature higher than 1000° C. on the intermediate layer, the intermediate layer and the additional layer forming a carrier substrate, and separating the buried brittle plane during the deposition of the additional layer.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: July 9, 2024
    Assignee: Soitec
    Inventors: Yann Sinquin, Jean-Marc Bethoux, Damien Radisson
  • Patent number: 11688627
    Abstract: A substrate for radiofrequency microelectronic devices comprises a carrier substrate made of a semi-conductor, a sintered composite layer disposed on the carrier substrate and formed from powders of at least a first dielectric material and a second dielectric different from the first material, the sintered composite layer having a thickness larger than 5 microns and a thermal expansion coefficient that is matched with that of the carrier substrate to plus or minus 30%.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: June 27, 2023
    Assignee: Soitec
    Inventors: Frederic Allibert, Christelle Veytizou, Damien Radisson
  • Patent number: 11462676
    Abstract: A method for adjusting the stress state of a piezoelectric film having a first stress state at room temperature includes a step of forming an assembly including a carrier having a thermal expansion coefficient, a compliant layer placed on the carrier, and the piezoelectric film placed on the compliant layer, the piezoelectric film having a thermal expansion coefficient different from that of the carrier. The method also includes a step of heat treating the assembly, in which the assembly is heated to a treatment temperature above the glass transition temperature of the compliant layer. The present disclosure also relates to a process for fabricating an acoustic wave device comprising the piezoelectric layer the stress state of which was adjusted as described herein.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: October 4, 2022
    Assignee: Soitec
    Inventors: Jean-Marc Bethoux, Yann Sinquin, Damien Radisson
  • Publication number: 20220270875
    Abstract: A method for producing a composite silicon carbide structure comprises: providing an initial substrate of monocrystalline silicon carbide; depositing an intermediate layer of polycrystalline silicon carbide at a temperature higher than 1000° C. on the initial substrate, the intermediate layer having a thickness greater than or equal to 1.5 microns; implanting light ionic species through the intermediate layer to form a buried brittle plane in the initial substrate, delimiting the thin layer between the buried brittle plane and the intermediate layer, and depositing an additional layer of polycrystalline silicon carbide at a temperature higher than 1000° C. on the intermediate layer, the intermediate layer and the additional layer forming a carrier substrate, and separating the buried brittle plane during the deposition of the additional layer.
    Type: Application
    Filed: July 2, 2020
    Publication date: August 25, 2022
    Inventors: Yann Sinquin, Jean-Marc Bethoux, Damien Radisson
  • Publication number: 20210028057
    Abstract: A substrate for radiofrequency microelectronic devices comprises a carrier substrate made of a semi-conductor, a sintered composite layer disposed on the carrier substrate and formed from powders of at least a first dielectric material and a second dielectric different from the first material, the sintered composite layer having a thickness larger than 5 microns and a thermal expansion coefficient that is matched with that of the carrier substrate to plus or minus 30%.
    Type: Application
    Filed: March 13, 2019
    Publication date: January 28, 2021
    Inventors: Frederic Allibert, Christelle Veytizou, Damien Radisson
  • Publication number: 20200044140
    Abstract: A method for adjusting the stress state of a piezoelectric film having a first stress state at room temperature includes a step of forming an assembly including a carrier having a thermal expansion coefficient, a compliant layer placed on the carrier, and the piezoelectric film placed on the compliant layer, the piezoelectric film having a thermal expansion coefficient different from that of the carrier. The method also includes a step of heat treating the assembly, in which the assembly is heated to a treatment temperature above the glass transition temperature of the compliant layer. The present disclosure also relates to a process for fabricating an acoustic wave device comprising the piezoelectric layer the stress state of which was adjusted as described herein.
    Type: Application
    Filed: March 27, 2018
    Publication date: February 6, 2020
    Inventors: Jean-Marc Bethoux, Yann Sinquin, Damien Radisson
  • Publication number: 20170120567
    Abstract: The invention relates to a method for directly adhering a lower substrate to an upper substrate which includes the following steps: a) providing a mounting; b) positioning the lower substrate on the mounting, the mounting being configured such as to raise a portion of the lower substrate; c) positioning the upper substrate above the lower substrate; d) allowing the upper substrate to fall by gravity onto the lower substrate such as to form an initial contact point between the upper substrate and the lower substrate, located on the raised portion of the lower substrate; and e) completing the contact between the upper substrate and the lower substrate such as to adhere the upper substrate to the lower substrate by direct adhesion.
    Type: Application
    Filed: June 9, 2015
    Publication date: May 4, 2017
    Applicant: COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Frank FOURNEL, Damien RADISSON