Abstract: In response to receiving an input string to be compressed, a plurality of diverse lossless compression techniques are applied to the input string to obtain a plurality of compressed strings. The plurality of diverse lossless compression techniques include a template-based compression technique and a non-template-based compression technique. A most compressed string among the plurality of compressed strings is selected. A determination is made regarding whether or not the most compressed string was obtained by application of the template-based compression technique. In response to determining that the most compressed string was obtained by application of the template-based compression technique, the most compressed string is compressed utilizing the non-template-based compression technique to obtain an output string and outputting the output string.

Abstract: In response to receipt of an input string, an attempt is made to identify, in a template store, a closely matching template for use as a compression template. In response to identification of a closely matching template that can be used as a compression template, the input string is compressed into a compressed string by reference to a longest common subsequence compression template. Compressing the input string includes encoding, in a compressed string, an identifier of the compression template, encoding substrings of the input string not having commonality with the compression template of at least a predetermined length as literals, and encoding substrings of the input string having commonality with the compression template of at least the predetermined length as a jump distance without reference to a base location in the compression template. The compressed string is then output.

Abstract: In response to receiving an input string to be compressed, a plurality of diverse lossless compression techniques are applied to the input string to obtain a plurality of compressed strings. The plurality of diverse lossless compression techniques include a template-based compression technique and a non-template-based compression technique. A most compressed string among the plurality of compressed strings is selected. A determination is made regarding whether or not the most compressed string was obtained by application of the template-based compression technique. In response to determining that the most compressed string was obtained by application of the template-based compression technique, the most compressed string is compressed utilizing the non-template-based compression technique to obtain an output string and outputting the output string.

Abstract: According to a method of simulation data processing, a difference is determined between a simulated value of a characteristic for a simulated integrated circuit device and a corresponding empirical value of the characteristic for a fabricated integrated circuit device. A data structure containing a simulation model of the fabricated integrated circuit device is accessed, where the data structure includes a plurality of entries each accessed via a unique index and an index used to access the data structure is offset in accordance with the difference between the simulated value and the empirical value. Operation of the simulated integrated circuit device is then simulated utilizing a value obtained from one of the plurality of entries of the data structure. Results of the simulation are stored in a data storage medium.

Abstract: A mechanism is provided for composite contention aware task scheduling. The mechanism performs task scheduling with shared resources in computer systems. A task is a group of instructions. A compute task is a group of compute instructions. A memory task, also referred to as a communication task, may be a group of load/store operations, for example. The mechanism performs composite contention-aware scheduling that considers the interaction among compute tasks, communication tasks, and application threads that include compute and communication tasks. The mechanism performs a composite of memory task throttling and application thread throttling.

Abstract: A mechanism is provided for composite contention aware task scheduling. The mechanism performs task scheduling with shared resources in computer systems. A task is a group of instructions. A compute task is a group of compute instructions. A memory task, also referred to as a communication task, may be a group of load/store operations, for example. The mechanism performs composite contention-aware scheduling that considers the interaction among compute tasks, communication tasks, and application threads that include compute and communication tasks. The mechanism performs a composite of memory task throttling and application thread throttling.

Abstract: Mechanisms are provided for performing approximate run-ahead computations. A first group of compute engines is selected to execute full computations on a full set of input data. A second group of compute engines is selected to execute computations on a sampled subset of the input data. A third group of compute engines is selected to compute a difference in computation results between first computation results generated by the first group of compute engines and second computation results generated by the second group of compute engines. The second group of compute engines is reconfigured based on the difference generated by the third group of compute engines.

Abstract: A system, apparatus, computer program product and method for authorizing information flows between devices of a data processing system are provided. In one illustrative embodiment, an information flow request is received from a first device to authorize an information flow from the first device to a second device. The information flow request includes an identifier of the second device. Based on an identifier of the first device and the second device, security information identifying an authorization level of the first device and second device is retrieved. A sensitivity of an information object that is to be transferred in the information flow is determined and the information flow is authorized or denied based only on the sensitivity of the information object and the authorization level of the first and second devices irregardless of the particular action being performed on the information object as part of the information flow.

Abstract: Mechanisms are provided for performing approximate run-ahead computations. A first group of compute engines is selected to execute full computations on a full set of input data. A second group of compute engines is selected to execute computations on a sampled subset of the input data. A third group of compute engines is selected to compute a difference in computation results between first computation results generated by the first group of compute engines and second computation results generated by the second group of compute engines. The second group of compute engines is reconfigured based on the difference generated by the third group of compute engines.

Abstract: Mechanisms are provided for decoding a variable length encoded data stream. A decoder of a data processing system receives an input line of data. The input line of data is a portion of the variable length encoded data stream. The decoder determines an amount of bit spill over of the input line of data onto a next input line of data. The decoder aligns the input line of data to begin at a symbol boundary based on the determined amount of bit spill over. The decoder tokenizes the aligned input line of data to generate a set of tokens. Each token corresponds to an encoded symbol in the aligned next input line of data. The decoder generates an output word of data based on the set of tokens. The output word of data corresponds to a word of data in the original set of data.

Abstract: Mechanisms are provided for decoding a variable length encoded data stream. A decoder of a data processing system receives an input line of data. The input line of data is a portion of the variable length encoded data stream. The decoder determines an amount of bit spill over of the input line of data onto a next input line of data. The decoder aligns the input line of data to begin at a symbol boundary based on the determined amount of bit spill over. The decoder tokenizes the aligned input line of data to generate a set of tokens. Each token corresponds to an encoded symbol in the aligned next input line of data. The decoder generates an output word of data based on the set of tokens. The output word of data corresponds to a word of data in the original set of data.

Abstract: A mechanism is provided for composite contention aware task scheduling. The mechanism performs task scheduling with shared resources in computer systems. A task is a group of instructions. A compute task is a group of compute instructions. A memory task, also referred to as a communication task, may be a group of load/store operations, for example. The mechanism performs composite contention-aware scheduling that considers the interaction among compute tasks, communication tasks, and application threads that include compute and communication tasks. The mechanism performs a composite of memory task throttling and application thread throttling.

Abstract: Mechanisms are provided for performing approximate run-ahead computations. A first group of compute engines is selected to execute full computations on a full set of input data. A second group of compute engines is selected to execute computations on a sampled subset of the input data. A third group of compute engines is selected to compute a difference in computation results between first computation results generated by the first group of compute engines and second computation results generated by the second group of compute engines. The second group of compute engines is reconfigured based on the difference generated by the third group of compute engines.

Abstract: Mechanisms are provided for performing approximate run-ahead computations. A first group of compute engines is selected to execute full computations on a full set of input data. A second group of compute engines is selected to execute computations on a sampled subset of the input data. A third group of compute engines is selected to compute a difference in computation results between first computation results generated by the first group of compute engines and second computation results generated by the second group of compute engines. The second group of compute engines is reconfigured based on the difference generated by the third group of compute engines.

Abstract: A mechanism is provided for composite contention aware task scheduling. The mechanism performs task scheduling with shared resources in computer systems. A task is a group of instructions. A compute task is a group of compute instructions. A memory task, also referred to as a communication task, may be a group of load/store operations, for example. The mechanism performs composite contention-aware scheduling that considers the interaction among compute tasks, communication tasks, and application threads that include compute and communication tasks. The mechanism performs a composite of memory task throttling and application thread throttling.

Abstract: According to the illustrative embodiments, a data structure is accessed to determine a set of known data points surrounding a queried data point having an input value and an output value, the set of known data points including first, second and third data points. First and second curves are built from the first, second and third data points utilizing a first approximate model and a second approximate model. A weighting parameter value is determined by which the first curve and second curve are blended at the second data point. The output value of the queried data point is determined and stored by blending the first curve and the second curve utilizing the input value of the queried data point and the weighting parameter value.

Abstract: A mechanism is provided for simultaneous photolithographic mask and target optimization (SMATO). A lithographic simulator generates an image of a mask shape on a wafer thereby forming one or more lithographic contours. A mask and target movement module analytically evaluates a direction for mask and target movement thereby forming a plurality of pairs of mask and target movements. The mask and target movement module identifies a best pair of mask and target movements from the plurality of mask and target movements that minimizes a weighted cost function. A shape adjustment module adjusts at least one of a target shape or the mask shape based on the best pair of mask and target movements.

Abstract: In accordance with one embodiment, a plurality of empirical measurements of a fabricated integrated circuit including a fabricated transistor having multiple terminals is received. The plurality of empirical measurements each include an empirical terminal current set and an empirical terminal voltage set for the terminals of the fabricated transistor. A mathematical simulation model of a simulated transistor is also received. Utilizing the mathematical simulation model, an intermediate data set is calculated by determining, for each of a plurality of different terminal voltage sets, a simulated terminal current set and a simulated terminal charge set. A modeling tool processes the intermediate data set to obtain a time domain simulation model of the fabricated transistor that, for each of the plurality of empirical measurements, provides a simulated terminal charge set. The time domain simulation model is stored in a computer-readable data storage medium.

Abstract: A system, apparatus, computer program product and method for authorizing information flows between devices of a data processing system are provided. In one illustrative embodiment, an information flow request is received from a first device to authorize an information flow from the first device to a second device. The information flow request includes an identifier of the second device. Based on an identifier of the first device and the second device, security information identifying an authorization level of the first device and second device is retrieved. A sensitivity of an information object that is to be transferred in the information flow is determined and the information flow is authorized or denied based only on the sensitivity of the information object and the authorization level of the first and second devices irregardless of the particular action being performed on the information object as part of the information flow.

Abstract: The present disclosure is directed to a method for determining a plurality of buffer insertion locations in a net for an integrated circuit design. The method may comprise calculating a plurality of resistive-capacitive (RC) influences in parallel, each RC influence corresponding to one of a plurality of buffering options available for a first sub-tree for the addition of a wire segment to the first sub-tree; updating the plurality of RC influences for the addition of a buffer for the first sub-tree, the buffer comprising one of a plurality of buffer types; and merging the first sub-tree with a second sub-tree in parallel by grouping the plurality of buffering options available for the first sub-tree and a plurality of buffering options available for the second sub-tree into a plurality of merging groups, and merging at least two groups of the plurality of merging groups in parallel.