Abstract: Devices, systems, methods, computer-implemented methods, apparatus, and/or computer program products that can facilitate an epitaxial Josephson junction transmon device are provided. According to an embodiment, a device can comprise a substrate. The device can further comprise an epitaxial Josephson junction transmon device coupled to the substrate. According to an embodiment, a device can comprise an epitaxial Josephson junction transmon device coupled to a substrate. The device can further comprise a tuning gate coupled to the substrate and formed across the epitaxial Josephson junction transmon device. According to an embodiment, a device can comprise a first superconducting region and a second superconducting region formed on a substrate. The device can further comprise an epitaxial Josephson junction tunneling channel coupled to the first superconducting region and the second superconducting region.

Abstract: Devices, systems, methods, computer-implemented methods, apparatus, and/or computer program products that can facilitate an epitaxial Josephson junction transmon device are provided. According to an embodiment, a device can comprise a substrate. The device can further comprise an epitaxial Josephson junction transmon device coupled to the substrate. According to an embodiment, a device can comprise an epitaxial Josephson junction transmon device coupled to a substrate. The device can further comprise a tuning gate coupled to the substrate and formed across the epitaxial Josephson junction transmon device. According to an embodiment, a device can comprise a first superconducting region and a second superconducting region formed on a substrate. The device can further comprise an epitaxial Josephson junction tunneling channel coupled to the first superconducting region and the second superconducting region.

Abstract: Techniques regarding qubit devices comprising silicon-based Josephson junctions and/or the manufacturing of qubit devices comprising silicon-based Josephson junctions are provided. For example, one or more embodiments described herein can comprise an apparatus that can include a Josephson junction comprising a tunnel barrier positioned between two vertically stacked superconducting silicon electrodes.

Abstract: Devices, systems, methods, computer-implemented methods, apparatus, and/or computer program products that can facilitate an epitaxial Josephson junction transmon device are provided. According to an embodiment, a device can comprise a substrate. The device can further comprise an epitaxial Josephson junction transmon device coupled to the substrate. According to an embodiment, a device can comprise an epitaxial Josephson junction transmon device coupled to a substrate. The device can further comprise a tuning gate coupled to the substrate and formed across the epitaxial Josephson junction transmon device. According to an embodiment, a device can comprise a first superconducting region and a second superconducting region formed on a substrate. The device can further comprise an epitaxial Josephson junction tunneling channel coupled to the first superconducting region and the second superconducting region.

Abstract: A method of fabricating a glassy carbon film is described. The method includes forming a soluble layer on a substrate, forming a lift-off stack that includes a lift-off mask layer and a hard-mask layer, and forming a pattern in the lift-off stack to expose a portion of the soluble layer. The exposed portions of the soluble layer are removed to expose a portion of the substrate. A carbon material is over the exposed portion of the substrate. The soluble layer is dissolved in a solvent, and the lift-off stack is lifted-off.

Abstract: Techniques regarding qubit devices comprising silicon-based Josephson junctions and/or the manufacturing of qubit devices comprising silicon-based Josephson junctions are provided. For example, one or more embodiments described herein can comprise an apparatus that can include a Josephson junction comprising a tunnel barrier positioned between two vertically stacked superconducting silicon electrodes.

Abstract: A method of fabricating a glassy carbon film is described. The method includes forming a soluble layer on a substrate, forming a lift-off stack that includes a lift-off mask layer and a hard-mask layer, and forming a pattern in the lift-off stack to expose a portion of the soluble layer. The exposed portions of the soluble layer are removed to expose a portion of the substrate. A carbon material is over the exposed portion of the substrate. The soluble layer is dissolved in a solvent, and the lift-off stack is lifted-off.

Abstract: A method of fabricating a visibly transparent, ultraviolet (UV) photodetector is provided. The method includes laying a first electrode onto a substrate surface, the first electrode being formed of a carbon-based, single-layer material. A block is patterned over an end of the first electrode and portions of the substrate surface. The block is formed of a visibly transparent material that is able to be deposited into the block at 75° C.-125° C. In addition, the method includes masking a section of the block and exposed sections of the first electrode. A second electrode is laid onto an unmasked section of the block with an end of the second electrode laid onto the substrate surface. The second electrode is formed of the carbon-based, single-layer material.

Abstract: A method of fabricating a visibly transparent, ultraviolet (UV) photodetector is provided. The method includes laying a first electrode onto a substrate surface, the first electrode being formed of a carbon-based, single-layer material. A block is patterned over an end of the first electrode and portions of the substrate surface. The block is formed of a visibly transparent material that is able to be deposited into the block at 75° C.-125° C. In addition, the method includes masking a section of the block and exposed sections of the first electrode. A second electrode is laid onto an unmasked section of the block with an end of the second electrode laid onto the substrate surface. The second electrode is formed of the carbon-based, single-layer material.

Abstract: A method of fabricating a visibly transparent, ultraviolet (UV) photodetector is provided. The method includes laying a first electrode onto a substrate surface, the first electrode being formed of a carbon-based, single-layer material. A block is patterned over an end of the first electrode and portions of the substrate surface. The block is formed of a visibly transparent material that is able to be deposited into the block at 75° C.-125° C. In addition, the method includes masking a section of the block and exposed sections of the first electrode. A second electrode is laid onto an unmasked section of the block with an end of the second electrode laid onto the substrate surface. The second electrode is formed of the carbon-based, single-layer material.

Abstract: A method of fabricating a visibly transparent, ultraviolet (UV) photodetector is provided. The method includes laying a first electrode onto a substrate surface, the first electrode being formed of a carbon-based, single-layer material. A block is patterned over an end of the first electrode and portions of the substrate surface. The block is formed of a visibly transparent material that is able to be deposited into the block at 75° C.-125° C. In addition, the method includes masking a section of the block and exposed sections of the first electrode. A second electrode is laid onto an unmasked section of the block with an end of the second electrode laid onto the substrate surface. The second electrode is formed of the carbon-based, single-layer material.

Abstract: A method (and system) for generating random numbers includes setting a drain voltage Vd on an MOSFET (metal oxide semiconductor field effect transistor) device and a gate voltage Vg of the MOSFET device so that the MOSFET device comprises a noise source configured in a manner such as to tune as desired a random number statistical distribution of an output of the MOSFET device. An output voltage of the MOSFET is provided as an input signal into a low noise amplifier and an output voltage of the low noise amplifier provides values for a random number generator.

Abstract: A method (and system) for generating random numbers includes setting a drain voltage Vd on an MOSFET (metal oxide semiconductor field effect transistor) device and a gate voltage Vg of the MOSFET device so that the MOSFET device comprises a noise source configured in a manner such as to tune as desired a random number statistical distribution of an output of the MOSFET device. An output voltage of the MOSFET is provided as an input signal into a low noise amplifier and an output voltage of the low noise amplifier provides values for a random number generator.

Abstract: A method (and system) for generating random numbers includes setting a drain voltage Vd on an MOSFET device to maximize a transconductance of the MOSFET device and setting a gate voltage Vg of the MOSFET device to tune as desired a random number statistical distribution of an output of the MOSFET device. The MOSFET device includes a gate structure with an oxide layer including at least one artificial trapping layer in which carrier traps are designed to occupy a predetermined distance from conduction and valance bands of material of the artificial trapping layer.

Abstract: A method (and system) for generating random numbers includes setting a drain voltage Vd on an MOSFET device to maximize a transconductance of the MOSFET device and setting a gate voltage Vg of the MOSFET device to tune as desired a random number statistical distribution of an output of the MOSFET device> The MOSFET device includes a gate structure with an oxide layer including at least one artificial trapping layer in which carrier traps are designed to occupy a predetermined distance from conduction and valance bands of material of the artificial trapping layer.

Abstract: A gate tunable diode is provided. The gate tunable diode includes a gate dielectric formed on a gate electrode and a graphene electrode formed on the gate dielectric. Also, the gate tunable diode includes a tunnel dielectric formed on the graphene electrode and a tunnel electrode formed on the tunnel dielectric.

Abstract: A gate tunable diode is provided. The gate tunable diode includes a gate dielectric formed on a gate electrode and a graphene electrode formed on the gate dielectric. Also, the gate tunable diode includes a tunnel dielectric formed on the graphene electrode and a tunnel electrode formed on the tunnel dielectric.

Abstract: A carbon-based semiconductor structure includes a substrate and a gate stack. The gate stack includes a carbon-based gate electrode formed on the substrate. The gate stack also includes a gate dielectric formed on the carbon-based gate electrode. The gate stack further includes a carbon-based channel formed on the gate dielectric.

Abstract: A gate tunable diode is provided. The gate tunable diode includes a gate dielectric formed on a gate electrode and a graphene electrode formed on the gate dielectric. Also, the gate tunable diode includes a tunnel dielectric formed on the graphene electrode and a tunnel electrode formed on the tunnel dielectric.

Abstract: A carbon-based semiconductor structure includes a substrate and a gate stack. The gate stack includes a carbon-based gate electrode formed on the substrate. The gate stack also includes a gate dielectric formed on the carbon-based gate electrode. The gate stack further includes a carbon-based channel formed on the gate dielectric.