Abstract: A device to produce an output based on interference of electron waves is disclosed. Said device comprised out of two areas having different medium properties for propagation of an electron wave, where the first of said areas is connected to a source to inject electrons and the second of said areas is connected to a drain to collect electrons while said electrons have a propagation path through the device starting at the source and ending at the drain. Said areas are designed in a manner to result in advancing and reflected waves having interleaved sections along said path which yield interference, either constructive or destructive, thus determining the transport probability of the electron through the device. Said device is operated either as a switch, in a first embodiment, by adding a control gate, or as a detector, in a second embodiment, used for measurement of external particle ensemble properties.

Abstract: A device to produce an output based on interference of electron waves is disclosed. Said device comprised out of two areas having different medium properties for propagation of an electron wave, where the first of said areas is connected to a source to inject electrons and the second of said areas is connected to a drain to collect electrons while said electrons have a propagation path through the device starting at the source and ending at the drain. Said areas are designed in a manner to result in advancing and reflected waves having interleaved sections along said path which yield interference, either constructive or destructive, thus determining the transport probability of the electron through the device. Said device is operated either as a switch, in a first embodiment, by adding a control gate, or as a detector, in a second embodiment, used for measurement of external particle ensemble properties.

Abstract: The invention is a new method for operating a flash EEPROM memory device and in particular for programming and erasing the device. The memory device has a first semiconductor region within a second semiconductor region, source and drain regions in the first semiconductor region, a well terminal inside the first semiconductor region, a charge storing layer electrically isolated from the first semiconductor region by a dielectric layer, and a control terminal electrically isolated from the charge storing layer by a inter layer dielectric. The method comprises the steps of: applying a first voltage bias of first polarity to the well terminal; allowing a first time period to elapse; resetting the first voltage bias to zero; while during the either the ramp up or the ramp down phase of said first voltage; applying a second voltage bias of second polarity opposite to the first polarity to the control terminal; allowing a second time period to elapse; and resetting the second voltage bias to zero.

Abstract: The invention is a new method for operating a flash EEPROM memory device and in particular for programming and erasing the device. The memory device has a first semiconductor region within a second semiconductor region, source and drain regions in the first semiconductor region, a well terminal inside the first semiconductor region, a charge storing layer electrically isolated from the first semiconductor region by a dielectric layer, and a control terminal electrically isolated from the charge storing layer by a inter layer dielectric. The method comprises the steps of: applying a first voltage bias of first polarity to the well terminal; allowing a first time period to elapse; applying a second voltage bias of second polarity opposite to the first polarity to the control terminal; resetting the first voltage bias to zero; allowing a second time period to elapse; and resetting the second voltage bias to zero.