Patents by Inventor Dan Feekes

Dan Feekes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060225046
    Abstract: An instruction cycle is determined from instructions stored in a cache, where the instruction cycle represents the sequence of instructions predicted to be executed by the processing device that are resident in the cache. The duration of the instruction cycle is estimated and one or more components of the processing device that are not expected to be used during the instruction cycle may be suspended for a portion or all or the duration. The components may be suspended by, for example, clock gating or by isolating the components from one or more power domains.
    Type: Application
    Filed: April 4, 2005
    Publication date: October 5, 2006
    Applicant: Advanced Micro Devices, Inc.
    Inventor: Dan Feekes