Abstract: For global navigation satellite system (GNSS)-independent operation of auxiliary PNT systems, one or more ground stations of the auxiliary system have access to a non-GNSS source of precision timing. That source and known locations of the ground stations may be used to derive timing corrections to account for imperfect clocks in the satellites for non-purpose-built satellite systems being used for PNT. Crosslinks between satellites and/or propagation of timing correction through other ground stations are used to better control the timing and resulting precession of PNT in the PNT auxiliary system. The timing correction may be provided as a service to end users, other constellations, and/or other satellite operators.

Abstract: For global navigation satellite system (GNSS)-independent operation of auxiliary PNT systems, one or more ground stations of the auxiliary system have access to a non-GNSS source of precision timing. That source and known locations of the ground stations may be used to derive timing corrections to account for imperfect clocks in the satellites for non-purpose-built satellite systems being used for PNT. Crosslinks between satellites and/or propagation of timing correction through other ground stations are used to better control the timing and resulting precession of PNT in the PNT auxiliary system. The timing correction may be provided as a service to end users, other constellations, and/or other satellite operators.

Abstract: Mapping of cacheable memory pages from other processes in a parallel job provides a very efficient mechanism for inter-process communication. A trivial address computation can then be used to look up a virtual address that allows the use of cacheable loads and stores to directly access or update the memory of other processes in the job for communication purposes. When an interconnection network permits the cacheable access of one host's memory from another host in the cluster, kernel and library software can map memory from processes on other hosts, in addition to the memory on the same host. This mapping can be done at the start of a parallel job using a system library interface. A function in an application programming interface provides a user-level, fast lookup of a virtual address that references data regions residing on all of the processes in a parallel job running across multiple hosts.

Abstract: An indexing style Automatic Port Cleaner for cleaning furnace combustion air ports employs multiple cleaning tips and rods enclosed substantially in a furnace windbox. An extension bar enclosed substantially in a furnace windbox to which the cleaning rods are attached with the extension bar carries the cleaning rods and tips in a translating and indexing motion. An extension bar is supported by two fulcrum rods and in turn supported by two fulcrum tubes and two fulcrum housings, the fulcrum housings being supported by a faceplate and fixed relative to the combustion air ports. The fulcrum rods translate relative to the fulcrum tubes while the fulcrum tubes rotate relative to the fulcrum housings. A linear actuator is disposed to create a reciprocating translating motion of the fulcrum rods, extension bar, cleaning rods, and cleaning tips. Indexing creates rotation of the fulcrum tubes, fulcrum rods, extension bar, cleaning rods, and cleaning tips, in a reciprocating fashion about the fulcrum housings.

Abstract: An indexing style Automatic Port Cleaner for cleaning furnace combustion air ports employs multiple cleaning tips and rods enclosed substantially in a furnace windbox. An extension bar enclosed substantially in a furnace windbox to which the cleaning rods are attached with the extension bar carries the cleaning rods and tips in a translating and indexing motion. An extension bar is supported by two fulcrum rods and in turn supported by two fulcrum tubes and two fulcrum housings, the fulcrum housings being supported by a faceplate and fixed relative to the combustion air ports. The fulcrum rods translate relative to the fulcrum tubes while the fulcrum tubes rotate relative to the fulcrum housings. A linear actuator is disposed to create a reciprocating translating motion of the fulcrum rods, extension bar, cleaning rods, and cleaning tips. Indexing creates rotation of the fulcrum tubes, fulcrum rods, extension bar, cleaning rods, and cleaning tips, in a reciprocating fashion about the fulcrum housings.

Abstract: Mapping of cacheable memory pages from other processes in a parallel job provides a very efficient mechanism for inter-process communication. A trivial address computation can then be used to look up a virtual address that allows the use of cacheable loads and stores to directly access or update the memory of other processes in the job for communication purposes. When an interconnection network permits the cacheable access of one host's memory from another host in the cluster, kernel and library software can map memory from processes on other hosts, in addition to the memory on the same host. This mapping can be done at the start of a parallel job using a system library interface. A function in an application programming interface provides a user-level, fast lookup of a virtual address that references data regions residing on all of the processes in a parallel job running across multiple hosts.

Abstract: Probe testing of an integrated circuit so as to achieve low probe needle contact resistance without probe needles “scrubbing” against bonding pads is achieved at high test signal frequencies by a probe needle assembly (14) including a plurality of probe needles (13) each having a shank portion (13A), a curved flex portion (13B), and a contact tip (13C) on a free end of the flex portion, the shank portion (13A) being electrically coupled to an electrical test system. The shank portion (13A) of each probe needle is attached to a surface (16A) of an insulative layer (16). The insulative layer is supported on a ground plane conductor 25. The flex portions (13B) of the probe needles (13) extend beyond an edge of the insulative layer. A portion (24) of the ground plane conductor (25) extends beyond the insulator (16) and is adjacent to all but an extending tip portion (30) of the flex portion (13B) of each probe needle (13).

Abstract: Probe card apparatus includes a base element having a central cutout portion and an insert block is disposed in the cut out portion. A probe card secured to the base element includes a plurality of needle elements which contact electrical elements on an integrated circuit chip on a wafer being tested. The base element and probe card are secured to a printed circuit board. The insert contacts the needle elements and biases them against the electrical elements being tested. The insert block is positionable relative to the base element and to the needle elements, and the base element is positionable relative to the printed circuit board.

Abstract: A system for testing an integrated circuit on a semiconductor wafer so as to achieve low probe needle contact resistance with low probe needle force and without substantial scrubbing includes a probe and supporting a plurality of probe needles electrically coupled to an electrical test system above and in alignment with a plurality of contact pads of the integrated circuit, respectively. The wafer is mechanically moved to press probe needles to bring a tip of each probe needle into physical contact with a corresponding contact pad, and is further moved to increase a needle force of each tip against the corresponding contact pad and cause flexing of a curved portion of each probe needle. Each probe needle is curved such that the flexing causes the tip of each probe needle to rock without appreciable sliding on the surface of the contact pad.

Abstract: A probe card assembly includes a probe card, an interposer and a probe array. The probe array includes a plurality of closely spaced pins, each pin includes a post and a beam, and each beam has a first end attached to the top of a post and a second end for contacting an integrated circuit. A bead on the second end of the beam assures that the free end of the beam will contact an IC first. For contacts on a grid, the beams extend diagonally relative to the rows and columns of the grid, enabling the beams to be longer. For contacts in a row on centers closer than the pins, two rows of pins straddle the contacts and the beams extend toward the contacts from opposite sides of the contacts. The probe array can be formed on the high density side of the interposer.

Abstract: Holder apparatus for holding an integrated circuit die for testing includes a carrier element for the die. The die is precisely located in the holder apparatus and a probe care which includes contact elements for contacting the appropriate pads on the die being tested is also secured to the holder apparatus and the card's probe needles are biased against the die. Different embodiments of the holder apparatus are disclosed, including holder apparatus with a removable alignment plate and holder apparatus with an integral alignment plate, both of which embodiments secure the die to the bottom of the holder apparatus, and holder apparatus in which the die or chip is secured to the top of the holder apparatus. Probe card apparatus usable with the various holder apparatus embodiments includes needles which comprise continuations of traces on the probe card and which include trace elements which may be connected directly to test circuitry without intermediate socket connectors.

Abstract: Probe card apparatus includes a base element having a central cutout portion and an insert block is disposed in the cut out portion. A probe card secured to the base element includes a plurality of needle elements which contact electrical elements on an integrated circuit chip on a wafer being tested. The base element and probe card are secured to a printed circuit board. The insert contacts the needle elements and biases them against the electrical elements being tested. The insert block is positionable relative to the base element and to the needle elements, and the base element is positionable relative to the printed circuit board.