Patents by Inventor Dan Hillman

Dan Hillman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12079554
    Abstract: A method for generating a reliability performance model includes developing a reliability prediction machine learning model for predicting reliability performance of a product based on data obtained from manufacturing and testing of the product, and obtaining feature names for the reliability prediction machine learning model and their predictive power values. The feature names may correspond to features from the data obtained from manufacturing and testing of the product. The method may further include extracting a set of feature names corresponding to features having highest predictive power values from the feature names, and generating a reliability performance model using one or more model parameters derived from the set of feature names.
    Type: Grant
    Filed: September 30, 2022
    Date of Patent: September 3, 2024
    Assignees: OPTIMAL PLUS LTD., ANSYS, Inc.
    Inventors: Shaul Teplinsky, Dan Sebban, Craig Hillman, Ashok Alagappan
  • Publication number: 20120032965
    Abstract: An accelerator chip can be positioned between a processor chip and a memory: The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine.
    Type: Application
    Filed: August 10, 2011
    Publication date: February 9, 2012
    Inventors: Mukesh K. Patel, Dan Hillman, Jay Kamdar, Jon Shiell, Udaykumar R. Raval
  • Publication number: 20120019549
    Abstract: An accelerator chip can be positioned between a processor chip and a memory. The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine.
    Type: Application
    Filed: May 25, 2011
    Publication date: January 26, 2012
    Inventors: Mukesh K. Patel, Dan Hillman, Jay Kamdar, Jon Shiell, Udaykumar R. Raval
  • Publication number: 20120023310
    Abstract: An accelerator chip can be positioned between a processor chip and a memory. The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine.
    Type: Application
    Filed: May 25, 2011
    Publication date: January 26, 2012
    Inventors: Mukesh K. Patel, Dan Hillman, Jay Kamdar, Jon Shiell, Udaykumar R. Raval
  • Publication number: 20120001926
    Abstract: An accelerator chip can be positioned between a processor chip and a memory. The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine.
    Type: Application
    Filed: May 25, 2011
    Publication date: January 5, 2012
    Inventors: Mukesh K. Patel, Dan Hillman, Jay Kamdar, Jon Shiell, Udaykumar R. Raval
  • Publication number: 20030023958
    Abstract: An accelerator chip can be positioned between a processor chip and a memory. The accelerator chip enhances the operation of a Java program by running portions of the Java program for the processor chip. In a preferred embodiment, the accelerator chip includes a hardware translator unit and a dedicated execution engine.
    Type: Application
    Filed: June 27, 2002
    Publication date: January 30, 2003
    Inventors: Mukesh K. Patel, Dan Hillman, Jay Kamdar, Jon Shiell, Udaykumar R. Raval