Patents by Inventor Dan Ilan
Dan Ilan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240118869Abstract: A method to compare between a first number and a second number includes the steps of storing the first number in a first row of an associative memory array, storing a two's complement representation of the second number in a second row of the associative memory array wherein bit i of the second number is stored in a same column of the associative memory array as bit i of the first number, concurrently performing a carry save operation on a plurality of columns of the associative memory array to create a sum and a carry, predicting a value of a carry out bit without adding the sum and the carry, and indicating that the first number is smaller than the second number if the value of the carry out bit is 1.Type: ApplicationFiled: December 17, 2023Publication date: April 11, 2024Inventor: Dan ILAN
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Publication number: 20220345315Abstract: A system to dynamically calculate a root hash value from a plurality of leaf hash values includes a flat associative memory and a hash parser. The flat associative memory stores a plurality of leaf hash values. The hash parser extracts a compressed number of branch nodes from the plurality of leaf hash values, determines branch node relationships from the plurality of leaf hash values, and saves the compressed number of branch nodes, and the branch node relationships.Type: ApplicationFiled: February 7, 2022Publication date: October 27, 2022Inventor: Dan ILAN
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Publication number: 20220318508Abstract: A system for N-gram classification in a field of interest via hyperdimensional computing includes an associative memory array and a controller. The associative memory array stores hyperdimensional vectors in rows of the array. The hyperdimensional vectors represent symbols in the field of interest and the array includes bit-line processors along portions of bit-lines of the array. The controller activates rows of the array to perform XNOR, permute, and add operations on the hyperdimensional vectors with the bit-line processors, to encode N-grams, having N symbols therein, to generate fingerprints of a portion of the field of interest from the N-grams, to store the fingerprints within the associative memory array, and to match an input sequence to one of the stored fingerprints.Type: ApplicationFiled: March 30, 2022Publication date: October 6, 2022Inventors: Dan ILAN, Tomer SERY
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Publication number: 20220300255Abstract: A system to generate true random numbers includes a RAM array, a null-read controller and a hash generator. The RAM array has memory cells and a sense amplifier. The memory cells store data therein, the cells are connected in rows to word lines and in columns to pairs of bit lines, and the sense amplifier senses a differential input signal. The null-read controller implements a null-read operation by the sense amplifier of a portion of the RAM array.Type: ApplicationFiled: March 21, 2022Publication date: September 22, 2022Inventors: Lee-Lean SHU, Dan ILAN, Tomer SERY, Avidan AKERIB
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Publication number: 20220244959Abstract: A system for parallel combinatorial design includes a processor, an in-memory vector processor and a storage unit. The processor includes a seed generator, a Cspan generator and a rule checker. The seed generator generates at least one seed to generate combinations of length N, defining a space of N choices of which M choices are to be selected. The Cspan generator generates at least one combination from the at least one seed and stores each combination in a separate column of the in-memory vector processor. The rule checker performs a parallel search at least in the in-memory vector processor for combinations which satisfy a rule and the storage unit receives search results of the rule checker from the in-memory vector processor.Type: ApplicationFiled: February 2, 2022Publication date: August 4, 2022Inventor: Dan ILAN
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Patent number: 11194519Abstract: A read and write data processing apparatus and method associated with computational memory cells formed as a memory/processing array (having a plurality of bit line sections) provides a mechanism to logically combine the computation results across multiple bit line sections in a section and across multiple sections, and transmit the combined result as an output of the processing array and/or store the combined result into one or more of those multiple bit line sections.Type: GrantFiled: December 13, 2019Date of Patent: December 7, 2021Assignee: GSI TECHNOLOGY, INC.Inventors: Bob Haig, Eli Ehrman, Dan Ilan, Patrick Chuang, Chao-Hung Chang, Mu-Hsiang Huang
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Publication number: 20210263707Abstract: A method for binary division includes the steps of having a current remainder provided as a sum bit-vector and a carry bit-vector, performing a carry save add operation between the sum bit-vector and the carry bit-vector and a two's complement representation of a denominator to produce a temporary sum and a temporary carry, predicting a sign bit of a full total of the temporary sum and the temporary carry and updating the remainder with the temporary sum and the temporary carry and incrementing a quotient if the sign bit is 0.Type: ApplicationFiled: January 19, 2021Publication date: August 26, 2021Inventor: Dan ILAN
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Publication number: 20210216246Abstract: A read and write data processing apparatus and method associated with computational memory cells formed as a memory/processing array (having a plurality of bit line sections) provides a mechanism to logically combine the computation results across multiple bit line sections in a section and across multiple sections, and transmit the combined result as an output of the processing array and/or store the combined result into one or more of those multiple bit line sections.Type: ApplicationFiled: October 27, 2020Publication date: July 15, 2021Applicant: GSI Technology, Inc.Inventors: Bob HAIG, Eli EHRMAN, Dan ILAN, Patrick CHUANG, Chao-Hung CHANG, Mu-Hsiang HUANG
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Publication number: 20210056085Abstract: A deduplication system includes a similarity searcher, a difference calculator, and a storage manager. The similarity searcher searches for a similar fingerprint in a database storing a plurality of local sensitive fingerprints, resembling a new fingerprint of a new block. The difference calculator computes a difference block between the input block and a similar block associated with the found similar fingerprint, and the storage manager updates the database with the new fingerprint and stores the difference block, if not empty, in a store. A method for deduplication includes searching in a database, storing a plurality of local sensitive fingerprints, a similar fingerprint, resembling a new fingerprint of a new block, calculating a difference block between the input block and a similar block associated with the similar fingerprint, if found, updating the database with the new fingerprint and storing the difference block, if it is not empty, in a storage unit.Type: ApplicationFiled: June 25, 2020Publication date: February 25, 2021Inventors: Avidan AKERIB, Dan ILAN, Eli EHRMAN, Elona EREZ
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Publication number: 20210011910Abstract: A similarity search system includes a database of original vectors, a hierarchical database of bins and a similarity searcher. The hierarchical database of bins is stored in an associative memory array, each bin identified by an order vector representing at least one original vector and the dimension of the order vector is smaller than the dimension of the original vector. The similarity searcher searches in the database for at least one similar bin whose order vector resembles an order vector representing a query vector and provides at least one original vector represented by the bin resembling the query vector.Type: ApplicationFiled: April 26, 2020Publication date: January 14, 2021Inventors: Dan ILAN, Amir Gottlieb
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Patent number: 10891076Abstract: A read and write data processing apparatus and method associated with computational memory cells formed as a memory/processing array (having a plurality of bit line sections) provides a mechanism to logically combine the computation results across multiple bit line sections in a section and across multiple sections, and transmit the combined result as an output of the processing array and/or store the combined result into one or more of those multiple bit line sections.Type: GrantFiled: October 4, 2018Date of Patent: January 12, 2021Assignee: GSI Technology, Inc.Inventors: Bob Haig, Eli Ehrman, Dan Ilan, Patrick Chuang, Chao-Hung Chang, Mu-Hsiang Huang
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Publication number: 20200117398Abstract: A read and write data processing apparatus and method associated with computational memory cells formed as a memory/processing array (having a plurality of bit line sections) provides a mechanism to logically combine the computation results across multiple bit line sections in a section and across multiple sections, and transmit the combined result as an output of the processing array and/or store the combined result into one or more of those multiple bit line sections.Type: ApplicationFiled: December 13, 2019Publication date: April 16, 2020Inventors: Bob Haig, Eli Ehrman, Dan Ilan, Patrick Chuang, Chao-Hung Chang, Mu-Hsiang Huang
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Patent number: 10303452Abstract: A cloud-based system is described for producing application deltas based on application recipes that identify components of the application deltas using unique identifiers, without the recipe containing all or any content of the actual application. The application recipe can be conveyed to an organization operating on an enterprise network, where the application recipe can be matched with application files in the organization's backup storage containing copies of content of endpoint devices on the network to retrieve components identified by the recipe and produce the application delta for the application. Subsequently, the application delta can be used as an installation package to perform IT operations such as installing the application on endpoint devices.Type: GrantFiled: July 18, 2017Date of Patent: May 28, 2019Assignee: VMware, Inc.Inventors: Tal Zamir, Shlomo Wygodny, Dan Ilan
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Patent number: 10200471Abstract: A method and system for workload migration across a hybrid network is provided. The method and system are directed to migrating a workload to a cloud by transferring the workload computing processes to the cloud, streaming workload data as necessary to execute the workload processes in the cloud, transferring the remaining workload data in a background process to cloud storage, and then completing migration by switching the primary data source of the workload computing processes to the cloud storage. In another aspect, a method and system are directed to migrating on-premises storage associated with a virtual machine to the cloud to be stored and executed in association with containerized applications. Additionally, techniques for full detach and partial detach of containerized applications are provided.Type: GrantFiled: March 19, 2018Date of Patent: February 5, 2019Assignee: Google LLCInventors: Leonid Vasetsky, Ady Degany, Shahar Glixman, Guy Yogev, Yaniv Ben-Ari, Dan Ilan
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Patent number: 10193831Abstract: A packet processing system and method for processing data units are provided. A packet processing system includes a processor, first memory having a first latency, and second memory having a second latency that is higher than the first latency. A first portion of a queue for queuing data units utilized by the processor is disposed in the first memory, and a second portion of the queue is disposed in the second memory. A queue manager is configured to push new data units to the second portion of the queue and generate an indication linking a new data unit to an earlier-received data unit in the queue. The queue manager is configured to transfer one or more queued data units from the second portion of the queue to the first portion of the queue prior to popping the queued data unit from the queue, and to update the indication.Type: GrantFiled: January 23, 2015Date of Patent: January 29, 2019Assignee: Marvell Israel (M.I.S.L) Ltd.Inventors: Itay Peled, Dan Ilan, Michael Weiner, Einat Ophir, Moshe Anschel
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Patent number: 10091293Abstract: A system for a mass centralization approach to full image cloning of multiple computing devices is provided. The system includes a server, and a computing device that includes a disk for data storage, wherein the disk includes a plurality of blocks within a plurality of regions. The system also includes a processor programmed to map each file stored on the disk to at least one of the plurality of blocks, for one or more of the plurality of regions of the disk, determine that a number of files appearing in sequential blocks exceeds a predefined threshold number of files, perform a continuous scan of the one or more of the plurality of regions of the disk occupied by the number of files appearing in sequential blocks exceeding the predefined threshold number of files, and send a copy of the files scanned from the one or more plurality of regions of the disk to the server.Type: GrantFiled: November 7, 2013Date of Patent: October 2, 2018Assignee: VMware, Inc.Inventors: Tal Zamir, Dan Ilan
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Publication number: 20180213036Abstract: A method and system for workload migration across a hybrid network is provided. The method and system are directed to migrating a workload to a cloud by transferring the workload computing processes to the cloud, streaming workload data as necessary to execute the workload processes in the cloud, transferring the remaining workload data in a background process to cloud storage, and then completing migration by switching the primary data source of the workload computing processes to the cloud storage. In another aspect, a method and system are directed to migrating on-premises storage associated with a virtual machine to the cloud to be stored and executed in association with containerized applications. Additionally, techniques for full detach and partial detach of containerized applications are provided.Type: ApplicationFiled: March 19, 2018Publication date: July 26, 2018Inventors: Leonid Vasetsky, Ady Degany, Shahar Glixman, Guy Yogev, Yaniv Ben-Ari, Dan Ilan
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Patent number: 9892083Abstract: Embodiments include a network device comprising: at least one processing core; a packet processing module configured to perform a first set of packet processing operations at a first rate, to partially process data units that are received at the network device, the packet processing module being further configured to transmit ones of the data units to the at least one processing core, the at least one processing core being configured to perform a second set of processing operations at a second rate, wherein the second set of processing operations is different from the first set of processing operations; an interconnecting module configured to interconnect the packet processing module and the at least one processing core; and a rate limiter configured to selectively control a transmission rate at which the data units are transmitted by the packet processing module to the at least one processing core based on the second rate.Type: GrantFiled: March 6, 2015Date of Patent: February 13, 2018Assignee: Marvell Israel (M.I.S.L) Ltd.Inventors: Itay Peled, Dan Ilan, Moshe Anschel, Michael Weiner, Eitan Joshua
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Patent number: 9838500Abstract: A network device and method for packet processing are provided. A packet processing accelerator is configured to receive packets from a network and define for ones of the packets a data unit corresponding to the packet. The packet processing accelerator is configured to perform a first set of packet processing operations on the data unit. A central processing unit (CPU) is configured to perform a second set of packet processing operations on the data unit. A buffer is configured to pass data units from the packet processing accelerator to the CPU, and vice versa, where the buffer is configured to store data units in one or more lines of the buffer. Dummy data units fill a space in a buffer line that is not occupied by a data unit, and the dummy data units include an indication that the space occupied by the dummy data units is an empty space.Type: GrantFiled: March 10, 2015Date of Patent: December 5, 2017Assignee: MARVELL ISRAEL (M.I.S.L) LTD.Inventors: Dan Ilan, Uri Dayan
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Patent number: 9813506Abstract: Techniques disclosed herein provide an approach for distributed self-served application remoting. In one embodiment, a user's own computing device, on which a remoted application runs, transmits user interface updates to a destination device which displays the updates and communicates back inputs (e.g., keyboard and mouse inputs) made at the destination device. The user may select an application for remoting by moving the application's window outside the boundaries of a desktop. This is similar to moving the application across computer screens in a multi-monitor setup and may create the illusion of a boundless desktop. In another embodiment, the user may remote the application to multiple destination devices using a “broadcast” mode. In yet another embodiment, the user may remote the application to a virtual machine.Type: GrantFiled: June 18, 2015Date of Patent: November 7, 2017Assignee: VMware, Inc.Inventors: Dan Ilan, Tal Zamir