Patents by Inventor Dan Ion Hariton

Dan Ion Hariton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7679464
    Abstract: A method and apparatus for frequency modulating a PWM involves 1) generating a high frequency carrier signal much greater in frequency than the PWM signal; 2) modulating the high frequency signal to generate a spread spectrum carrier signal; and, 3) retiming a PWM signal with this high frequency SS carrier signal so that the binary transitions of the PWM signal are aligned with the frequency varying carrier signal. In another embodiment, a PWM oscillator is driven by a second, FM oscillator having spread spectrum characteristics. In another embodiment a PWM oscillator is driven and modulated by a counter/frequency divider comprised of modules.
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: March 16, 2010
    Inventors: Dan Ion Hariton, Narendar Venugopal
  • Patent number: 7561002
    Abstract: A method and apparatus for frequency modulating a PWM involves 1) generating a high frequency carrier signal much greater in frequency than the PWM signal; 2) modulating the high frequency signal to generate a spread spectrum carrier signal; and, 3) retiming a PWM signal with this high frequency SS carrier signal so that the binary transitions of the PWM signal are aligned with the frequency varying carrier signal. In another embodiment, a PWM oscillator is driven by a second, FM oscillator having spread spectrum characteristics. In another embodiment a PWM oscillator is driven and modulated by a counter/frequency divider comprised of modules.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: July 14, 2009
    Assignee: Pulsecore Semiconductor, Inc.
    Inventors: Dan Ion Hariton, Narendar Venugopal
  • Publication number: 20080157894
    Abstract: A method and apparatus for frequency modulating a PWM involves 1) generating a high frequency carrier signal much greater in frequency than the PWM signal; 2) modulating the high frequency signal to generate a spread spectrum carrier signal; and, 3) retiming a PWM signal with this high frequency SS carrier signal so that the binary transitions of the PWM signal are aligned with the frequency varying carrier signal. In another embodiment, a PWM oscillator is driven by a second, FM oscillator having spread spectrum characteristics. In another embodiment a PWM oscillator is driven and modulated by a counter/frequency divider comprised of modules.
    Type: Application
    Filed: March 3, 2008
    Publication date: July 3, 2008
    Inventors: Dan Ion Hariton, Narendar Venugopal
  • Patent number: 6646463
    Abstract: A method and device to emulate impedances includes a pair of impedances connected in series between two circuit nodes, the impedances forming a voltage divider having at its midpoint a reference voltage VX. An OP AMP includes a positive input connected to the VX—node and the negative input connected to the output thereof in a direct feedback loop. The OP AMP output is also connected to a load impedance that is connected either one of the nodes. A transistor may be interposed between the load impedance and the circuit node. The OP AMP may be provided with a negative gain to emulate an inductor. The voltage divider may be variable to emulate a variable impedance.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: November 11, 2003
    Assignee: Alliance Semiconductor
    Inventor: Dan Ion Hariton
  • Patent number: 6624405
    Abstract: A dual function circuit for providing an output voltage to a transimpedance amplifier is disclosed. The dual function circuit can be selected between functioning as a current to voltage conversion circuit connected to a photodiode and as a testing circuit for testing the transimpedance amplifier without exposing light to the photodiode. The dual function circuit comprises two current mirror pairs to ensure that a substantially similar dc bias current is applied to the two driving transistors. In addition, by applying an input testing voltage to the two driving transistors in a common gate/base design, the output of the testing circuit has wide band frequency response. No switching is required to select between the test mode and the normal mode.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: September 23, 2003
    Assignee: Capella Microsystems, Inc.
    Inventors: Anthony Lau, Dan Ion Hariton
  • Patent number: 6351137
    Abstract: A method and device to emulate impedances includes a pair of impedances connected in series between a supply voltage and ground, the impedances forming a voltage divider having at its midpoint a reference voltage Vx. An OP AMP includes a positive input connected to the Vx node and the negative input connected to the output thereof in a direct feedback loop. The OP AMP output is also connected to a load impedance that is connected either to the supply voltage or ground. The unity gain OP AMP forces the output voltage thereof to follow the input voltage Vx, whereby the output voltage behaves as if it were created by a virtual impedance. By proper choice of components and values, the virtual impedance may comprise a large capacitor, and the remaining impedances may comprise resistance and small capacitance, both of which, together with the OP AMP, are easily integrated in a small die area.
    Type: Grant
    Filed: August 15, 2000
    Date of Patent: February 26, 2002
    Assignee: Pulsecore, Inc.
    Inventor: Dan Ion Hariton
  • Patent number: 6104588
    Abstract: An electrostatic discharge (ESD) protection circuit includes circuitry for providing protection against ESD events which occur either within an ESD pad ring (intra-ring) or between different ESD pad rings (inter-ring). Self-triggering voltage clamp circuits or back-to-back diode circuits can be used to properly interconnect the positive polarity rails and the negative polarity rails of the ESD pad rings. Self-triggering voltage clamp circuits are advantageous in that they provide improved ac signal isolation (i.e. reduced noise coupling between the ESD pad rings, and thus reduced noise coupling from the digital I/O pads to the analog I/O pads).
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: August 15, 2000
    Assignee: National Semiconductor Corporation
    Inventors: Dan Ion Hariton, Ronald Pasqualini
  • Patent number: 5920232
    Abstract: A compensated, bias-dependent signal filtration and amplification circuit includes a low-pass RC filter with a bias-dependent frequency response caused by the use of MOS transistors connected as capacitors with bias-dependent capacitances. A dc current source is used, in cooperation with the resistors of the RC filter, to generate a fixed bias for the capacitor-connected MOS transistors and thereby eliminate the bias dependencies of the capacitances. Following amplification of the filtered signal, another dc current is subtracted out from the amplified output signal so as to eliminate any residual dc signal components due to the input compensation dc bias signal, thereby leaving only the amplified filtered ac signal components.
    Type: Grant
    Filed: June 12, 1998
    Date of Patent: July 6, 1999
    Assignee: National Semiconductor Corporation
    Inventor: Dan Ion Hariton