Abstract: A signal transferring circuit for transferring data from a central system to electronic units coupled in series is disclosed. The signal transferring circuit comprises a first terminal for receiving a data signal and a second terminal for transmitting the data signal. It further comprises a first buffer having an input terminal and an output terminal. The input terminal is coupled to the first terminal, and the first buffer is enabled to transfer the data signal from the first terminal to a predetermined destination under a first condition. The signal transferring circuit also comprises a second buffer having an input terminal that is coupled to the predetermined destination and an output terminal that is coupled to the second terminal. The second buffer is enabled for transferring the data signal from the predetermined destination to the second terminal under the first condition.

Abstract: A local power failure detection and clock disabling circuit operates within a node coupled to a bus structure. The node includes multiple ports and physical connections for supporting multiple applications. Each physical connection serves as a bus transceiver for receiving and transmitting communications over the bus structure. The node includes a local power supply and a clock signal which is provided to each of the physical connections within the node. A detection circuit is coupled to the local power supply for detecting whether or not a sufficient level of power is being supplied from the local power supply. The clock signal is always provided to a master physical connection within the node, which is responsible for repeating communications across the bus structure. The master physical connection draws power from the backup power supply source when the local power supply is not supplying a sufficient level of power.