Patents by Inventor Dan Maydan

Dan Maydan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040166612
    Abstract: A method of fabricating a silicon-on-insulator structure having a silicon surface layer in a semiconductor workpiece, is carried out by maintaining the workpiece at an elevated temperature and producing an oxygen-containing plasma in the chamber while applying a bias to the workpiece and setting the bias to a level corresponding to an implant depth in the workpiece below the silicon surface layer to which oxygen atoms are to be implanted, whereby to form an oxygen-implanted layer in the workpiece having an oxygen concentration distribution generally centered at the implant depth and having a finite oxygen concentration in the silicon surface layer. The oxygen concentration in the silicon surface layer is then reduced to permit epitaxial silicon deposition.
    Type: Application
    Filed: February 24, 2004
    Publication date: August 26, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Dan Maydan, Randir P.S. Thakur, Kenneth S. Collins, Amir Al-Bayati, Hiroji Hanawa, Kartik Ramaswamy, Biagio Gallo, Andrew Nguyen
  • Patent number: 6770134
    Abstract: A method of forming a planar waveguide structure, comprising forming a first graded layer on a substrate, wherein the first graded layer comprises a first and a second optical material, wherein the concentration of the first optical material increases with the height of the first graded layer; forming a second graded layer on the first graded layer, the second graded layer comprising the first and second optical materials wherein the concentration of the first optical material decreases with the height of the second graded layer. The method further including forming a uniform layer on the first graded layer, the uniform layer containing first and second optical materials wherein the first optical material concentration is constant.
    Type: Grant
    Filed: May 24, 2001
    Date of Patent: August 3, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Dan Maydan, Arkadii V. Samoilov
  • Publication number: 20040121605
    Abstract: A method and apparatus for the formation of oxide in a manner having a planarizing effect on underlying material, e.g., silicon. In particular, an oxide having a nonuniform thickness profile is grown on the underlying material. The nonuniform thickness profile of the oxide is selected according to the nonuniform profile of the underlying material. Subsequent removal of the oxide leaves behind a planarized surface of the underlying material, as compared to the pre-oxidized surface.
    Type: Application
    Filed: December 19, 2002
    Publication date: June 24, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Dan Maydan, Randhir Thakur
  • Publication number: 20040114853
    Abstract: An article of manufacture comprising an optical-ready substrate made of a first semiconductor layer, an insulating layer on top of the first semiconductor layer, and a second semiconductor layer on top of the insulating layer, wherein the second semiconductor layer has a top surface and is laterally divided into two regions including a first region and a second region, the top surface of the first region being of a quality that is sufficient to permit microelectronic circuitry to be formed therein and the second region including an optical signal distribution circuit formed therein, the optical signal distribution circuit made up of interconnected semiconductor photonic elements and designed to provide signals to the microelectronic circuit to be fabricated in the first region of the second semiconductor layer.
    Type: Application
    Filed: July 21, 2003
    Publication date: June 17, 2004
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Claes Bjorkman, Lawrence C. West, Dan Maydan, Samuel Broydo
  • Patent number: 6721162
    Abstract: An electrostatic chuck has an electrode capable of being electrically charged to electrostatically hold a substrate. A composite layer covers the electrode. The composite layer comprises (1) a first dielectric material covering a central portion of the electrode, and (2) a second dielectric material covering a peripheral portion of the electrode, the second dielectric material having a different composition than the composition of the first dielectric material. The chuck is useful in a plasma process chamber to process substrates, such as semiconductor wafers.
    Type: Grant
    Filed: March 12, 2002
    Date of Patent: April 13, 2004
    Assignee: Applied Materials Inc.
    Inventors: Edwin C. Weldon, Kenneth S. Collins, Arik Donde, Brian Lue, Dan Maydan, Robert J. Steger, Timothy Dyer, Ananda H. Kumar, Alexander M. Veytser, Kadthala R. Narendrnath, Semyon L. Kats, Arnold Kholodenko, Shamouil Shamouilian, Dennis S. Grimard
  • Publication number: 20040012041
    Abstract: An optical ready substrate made at least in part of a first semiconductor material and having a front side and a backside, the front side having a top surface that is of sufficient quality to permit microelectronic circuitry to be fabricated thereon using semiconductor fabrication processing techniques. The optical ready substrate includes an optical signal distribution circuit fabricated on the front side of the substrate in a first layer region beneath the top surface of the substrate. The optical signal distribution circuit is made up of interconnected semiconductor photonic elements and designed to provide signals to the microelectronic circuitry to be fabricated thereon.
    Type: Application
    Filed: October 25, 2002
    Publication date: January 22, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Lawrence C. West, Claes Bjorkman, Dan Maydan, Samuel Broydo
  • Publication number: 20040013338
    Abstract: An article of manufacture comprising an optical ready substrate made of a first semiconductor layer, an insulating layer on top of the first semiconductor layer, and a second semiconductor layer on top of the insulating layer, wherein the second semiconductor layer has a top surface and is laterally divided into two regions including a first region and a second region, the top surface of the first region being of a quality that is sufficient to permit microelectronic circuitry to be formed therein and the second region including an optical signal distribution circuit formed therein, the optical signal distribution circuit made up of interconnected semiconductor photonic elements and designed to provide signals to the microelectronic circuit to be fabricated in the first region of the second semiconductor layer.
    Type: Application
    Filed: October 25, 2002
    Publication date: January 22, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Claes Bjorkman, Lawrence C. West, Dan Maydan, Samuel Broydo
  • Publication number: 20030219540
    Abstract: A method and apparatus for forming a polysilicon layer on a pre-annealed glass substrate. In one aspect, the method includes loading a pre-annealed glass substrate in a deposition chamber, depositing an amorphous silicon layer on the pre-annealed glass substrate, and annealing the pre-annealed glass substrate to form a polysilicon layer thereon. The amorphous silicon layer may be deposited concurrently with the annealing step to produce the polysilicon layer on the pre-annealed glass substrate. A nitride layer and/or an oxide layer may be deposited prior to depositing the amorphous silicon layer and annealing the pre-annealed glass substrate.
    Type: Application
    Filed: March 11, 2003
    Publication date: November 27, 2003
    Inventors: Kam S. Law, Dan Maydan
  • Publication number: 20030218424
    Abstract: A plasma display panel including a low k dielectric layer. In one embodiment, the dielectric layer is comprises a fluorine-doped silicon oxide layer such as an SiOF layer. In another embodiment, the dielectric layer comprises a Black Diamond™ layer. In certain embodiments, a capping layer such as SiN or SiON is deposited over the dielectric layer.
    Type: Application
    Filed: June 11, 2003
    Publication date: November 27, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Kam S. Law, Quanyuan Shang, Takako Takehara, Taekyung Won, William R. Harshbarger, Dan Maydan
  • Publication number: 20030194825
    Abstract: A method of gate metal layer deposition using a cyclical deposition process for thin film transistor applications is described. The cyclical deposition process comprises alternately adsorbing a metal-containing precursor and a reducing gas on a substrate. Thin film transistors, such as a bottom-gate transistor or a top-gate transistor, including a gate layer, may be formed using such cyclical deposition techniques.
    Type: Application
    Filed: April 10, 2002
    Publication date: October 16, 2003
    Inventors: Kam Law, Quan Yuan Shang, William Reid Harshbarger, Dan Maydan
  • Publication number: 20030189208
    Abstract: A method of silicon layer deposition using a cyclical deposition process. The cyclical deposition process comprises alternately adsorbing a silicon-containing precursor and a reducing gas on a substrate structure. Thin film transistors, such as for example a bottom-gate transistor or a top-gate transistor, including one or more silicon layers may, be formed using such cyclical deposition techniques.
    Type: Application
    Filed: April 5, 2002
    Publication date: October 9, 2003
    Inventors: Kam Law, Quan-Yang Shang, William Reid Harshbarger, Dan Maydan
  • Publication number: 20030189232
    Abstract: A method of passivation layer deposition using a cyclical deposition process is described. The cyclical deposition process may comprise alternately adsorbing a silicon-containing precursor and a reactant gas on a substrate structure. Thin film transistors, such as a bottom-gate transistor or a top-gate transistor, including a silicon-containing passivation layer, may be formed using such cyclical deposition techniques.
    Type: Application
    Filed: April 9, 2002
    Publication date: October 9, 2003
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Kam Law, Quan Yuan Shang, William Reid Harshbarger, Dan Maydan
  • Publication number: 20030186561
    Abstract: A method of film layer deposition is described. A film layer is deposited using a cyclical deposition process. The cyclical deposition process consists essentially of a continuous flow of one or more process gases and the alternate pulsing of a precursor and energy to form a film on a substrate structure.
    Type: Application
    Filed: September 24, 2002
    Publication date: October 2, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Kam S. Law, Quanyuan Shang, William R. Harshbarger, Dan Maydan, Soo Young Choi, Beom Soo Park, Sanjay Yadav, John M. White
  • Patent number: 6610354
    Abstract: A plasma display panel including a low k dielectric layer. In one embodiment, the dielectric layer is comprises a fluorine-doped silicon oxide layer such as an SiOF layer. In another embodiment, the dielectric layer comprises a Black Diamond™ layer. In certain embodiments, a capping layer such as SiN or SiON is deposited over the dielectric layer.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: August 26, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Kam S. Law, Quanyuan Shang, Takako Takehara, Taekyung Won, William R. Harshbarger, Dan Maydan
  • Publication number: 20030138560
    Abstract: An apparatus for processing substrates is disclosed. In one embodiment, the apparatus includes a housing and a plurality of stacked cell structures in the housing. An actuator is adapted to move the plurality of stacked cell structures inside of the housing while substrates in the stacked cell structures are being heated.
    Type: Application
    Filed: October 22, 2002
    Publication date: July 24, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Jun Zhao, David Quach, Timothy Weidman, Rick J. Roberts, Farhad Moghadam, Dan Maydan
  • Patent number: 6576110
    Abstract: An anode is configured to be used within a metal film plating apparatus. The anode has a substantially planar electric field generating portion and an electrolyte solution chemical reaction portion. The planar electric field generating portion is coated with an inert material that is impervious to the electrolyte solution. In one embodiment, the anode is formed as a perforated anode. In one aspect, the electric field generating portion is formed contiguous with the electrolyte solution chemical reaction portion. In another aspects, the planar electric field generating portion is formed as a distinct member from the electrolyte solution chemical reaction portion.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: June 10, 2003
    Assignee: Applied Materials, Inc.
    Inventor: Dan Maydan
  • Patent number: 6514850
    Abstract: Methods of forming an interface in a dielectric material to act as an indicator for terminating an etching process, and products produced thereby.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: February 4, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Li-Qun Xia, Huong Thanh Nguyen, Ellie Yieh, Dan Maydan
  • Patent number: 6503375
    Abstract: The present invention generally provides an apparatus for forming a doped metal film on a conductive substrate. In one aspect of the invention, an apparatus is provided that includes a phosphorus doped anode used for depositing a phosphorus doped metal film, such as a seed layer, in an electrochemical deposition process. The phosphorus doped anode preferably includes an enclosure providing for flow of an electrolyte therethrough, a phosphorus doped metal disposed within the enclosure, and an electrode disposed through the enclosure and in electrical connection with the phosphorus doped metal.
    Type: Grant
    Filed: February 11, 2000
    Date of Patent: January 7, 2003
    Assignee: Applied Materials, Inc
    Inventors: Dan Maydan, Ashok K. Sinha
  • Publication number: 20020190651
    Abstract: A plasma display panel including a low k dielectric layer. In one embodiment, the dielectric layer is comprises a fluorine-doped silicon oxide layer such as an SiOF layer. In another embodiment, the dielectric layer comprises a Black Diamond™ layer. In certain embodiments, a capping layer such as SiN or SiON is deposited over the dielectric layer.
    Type: Application
    Filed: June 18, 2001
    Publication date: December 19, 2002
    Applicant: Applied Materials, Inc.
    Inventors: Kam S. Law, Quanyuan Shang, Takako Takehara, Taekyung Won, William R. Harshbarger, Dan Maydan
  • Publication number: 20020174826
    Abstract: A method of forming a planar waveguide structure, comprising forming a first graded layer on a substrate, wherein the first graded layer comprises a first and a second optical material, wherein the concentration of the first optical material increases with the height of the first graded layer; forming a second graded layer on the first graded layer, the second graded layer comprising the first and second optical materials wherein the concentration of the first optical material decreases with the height of the second graded layer. The method further including forming a uniform layer on the first graded layer, the uniform layer containing first and second optical materials wherein the first optical material concentration is constant.
    Type: Application
    Filed: May 24, 2001
    Publication date: November 28, 2002
    Inventors: Dan Maydan, Arkadii V. Samoilov