Patents by Inventor Dan Newman

Dan Newman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220043905
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a network such as the Internet. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and hardware-protects it from alteration. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Application
    Filed: June 14, 2021
    Publication date: February 10, 2022
    Inventors: Frank N. Newman, Dan Newman
  • Patent number: 11061832
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a public network such as the Internet, or over a private connection. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and can be configured to hardware-protect that code from alteration. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: July 13, 2021
    Inventors: Frank N. Newman, Dan Newman
  • Patent number: 11036653
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a public network such as the Internet, or over a private connection. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and can be configured to hardware-protect that code from alteration. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: June 15, 2021
    Inventors: Frank N. Newman, Dan Newman
  • Patent number: 11030301
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a public network such as the Internet, or over a private connection. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and can be configured to hardware-protect that code from alteration. The second partition is hardware-limited from reading from or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: June 8, 2021
    Inventors: Frank N. Newman, Dan Newman
  • Publication number: 20200301853
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a public network such as the Internet, or over a private connection. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and can be configured to hardware-protect that code from alteration. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Application
    Filed: March 27, 2020
    Publication date: September 24, 2020
    Inventors: Frank N. Newman, Dan Newman
  • Publication number: 20200134170
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a network such as the Internet. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and hardware-protects it from alteration. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Application
    Filed: May 15, 2019
    Publication date: April 30, 2020
    Inventors: Frank N. Newman, Dan Newman
  • Patent number: 10606768
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a network such as the Internet. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and hardware-protects it from alteration. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: March 31, 2020
    Assignee: PathGuard, LLC
    Inventors: Frank N. Newman, Dan Newman
  • Publication number: 20190278718
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a network such as the Internet. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and hardware-protects it from alteration. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Application
    Filed: October 1, 2018
    Publication date: September 12, 2019
    Inventors: Frank N. Newman, Dan Newman
  • Patent number: 10311226
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a network such as the Internet. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and hardware-protects it from alteration. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: June 4, 2019
    Assignee: Newman H-R Computer Design, LLC
    Inventors: Frank N. Newman, Dan Newman
  • Publication number: 20180330076
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a network such as the Internet. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and hardware-protects it from alteration. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Application
    Filed: May 7, 2018
    Publication date: November 15, 2018
    Inventors: Frank N. Newman, Dan Newman
  • Patent number: 10089248
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a network such as the Internet. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and hardware-protects it from alteration. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: October 2, 2018
    Assignee: Newman H-R Computer Design, LLC
    Inventors: Frank N. Newman, Dan Newman
  • Patent number: 10002245
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a network such as the Internet. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and hardware-protects it from alteration. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: June 19, 2018
    Assignee: Newman H-R Computer Design, LLC
    Inventors: Frank N. Newman, Dan Newman
  • Publication number: 20170235944
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a network such as the Internet. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and hardware-protects it from alteration. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Application
    Filed: January 5, 2017
    Publication date: August 17, 2017
    Inventors: Frank N. Newman, Dan Newman
  • Publication number: 20170169222
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a network such as the Internet. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing for program code and hardware-protects it from alteration. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Application
    Filed: February 20, 2017
    Publication date: June 15, 2017
    Inventors: Frank N. Newman, Dan Newman
  • Publication number: 20170063877
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a network such as the Internet. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition through a bus or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing between computer executable code, critical data files, and data files read from the second partition. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Application
    Filed: August 31, 2015
    Publication date: March 2, 2017
    Applicant: Newman H-R Computer Design, LLC
    Inventors: Frank N. Newman, Dan Newman
  • Patent number: 9578054
    Abstract: A computer architecture is disclosed for implementing a hacking-resistant computing device. The computing device, which could be a mainframe computer, personal computer, smartphone, or any other computing device suitable for network communication, comprises a first partition and a second partition. The second partition can communicate over a network such as the Internet. In contrast, the first partition cannot connect to the Internet, and can directly communicate only with the second partition through a bus or with input/output devices directly connected to the first partition. Further, the first partition segments its memory addressing between computer executable code, critical data files, and data files read from the second partition. The second partition is hardware-limited from reading or writing to the memory addressing of the first partition. As a result, the critical data files and program code stored on the first partition are protected from malicious code affecting the second partition.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: February 21, 2017
    Assignee: Newman H-R Computer Design, LLC
    Inventors: Frank N. Newman, Dan Newman
  • Patent number: 9405924
    Abstract: Systems and methods are provided to facilitate anticipatory pushing of content to clients of a communications network in such a way that the content is unusable by the anticipatory clients until explicitly requested. Embodiments apply one or more self-keying techniques to a content dataset to generate an anticipatory dataset, such that the anticipatory dataset cannot be used to reconstruct the content dataset without a keying dataset that also can only be generated using the content dataset. The anticipatory dataset is pre-pushed to a client in anticipation of a future request for the content. If and when the client subsequently issues a request for the content dataset, the server intercepts the new copy of the content dataset received in response to the request, uses the content dataset to generate the keying dataset, and communicates the keying dataset to the client for local reconstruction of the content dataset by the client.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: August 2, 2016
    Assignee: VIASAT, INC.
    Inventors: William B. Sebastian, Dan Newman
  • Publication number: 20130326217
    Abstract: Systems and methods are provided to facilitate anticipatory pushing of content to clients of a communications network in such a way that the content is unusable by the anticipatory clients until explicitly requested. Embodiments apply one or more self-keying techniques to a content dataset to generate an anticipatory dataset, such that the anticipatory dataset cannot be used to reconstruct the content dataset without a keying dataset that also can only be generated using the content dataset. The anticipatory dataset is pre-pushed to a client in anticipation of a future request for the content. If and when the client subsequently issues a request for the content dataset, the server intercepts the new copy of the content dataset received in response to the request, uses the content dataset to generate the keying dataset, and communicates the keying dataset to the client for local reconstruction of the content dataset by the client.
    Type: Application
    Filed: August 2, 2013
    Publication date: December 5, 2013
    Applicant: ViaSat, Inc.
    Inventors: William B. Sebastian, Dan Newman
  • Patent number: 8516253
    Abstract: Systems and methods are provided to facilitate anticipatory pushing of content to clients of a communications network in such a way that the content is unusable by the anticipatory clients until explicitly requested. Embodiments apply one or more self-keying techniques to a content dataset to generate an anticipatory dataset, such that the anticipatory dataset cannot be used to reconstruct the content dataset without a keying dataset that also can only be generated using the content dataset. The anticipatory dataset is pre-pushed to a client in anticipation of a future request for the content. If and when the client subsequently issues a request for the content dataset, the server intercepts the new copy of the content dataset received in response to the request, uses the content dataset to generate the keying dataset, and communicates the keying dataset to the client for local reconstruction of the content dataset by the client.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: August 20, 2013
    Assignee: ViaSat, Inc.
    Inventors: William B. Sebastian, Dan Newman
  • Patent number: 8171135
    Abstract: The present invention relates to systems, apparatus, and methods of determining whether to abort a prefetch operation. Embodiments include accumulator functionality for accumulating object data prior to making an abort determination. Certain embodiments compress the accumulated data to more accurately reflect the cost of pushing the data to the client as part of the prefetch operation. Accumulation and/or compression of the data may provide sufficient data relating to the size of the object to make a useful prefetch abort determination, even where the size of the object cannot be otherwise determined (e.g., from the object data header). Other embodiments store accumulated data (e.g., in compressed or uncompressed form) for use in further optimizing prefetch operations. For example, if an accumulated prefetch is aborted before the object is forwarded to the client, and the client later requests the object, the object may be pushed to the client from server-side storage, rather than retrieving (e.g.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: May 1, 2012
    Assignee: ViaSat, Inc.
    Inventors: William B. Sebastian, Dan Newman