Abstract: An information handling system includes a timing controller configured to transmit a command for a common voltage of a particular frame rate to a power management circuit. A storage component may store digital information, wherein each digital information is associated with the common voltage of a particular frame rate. The power management circuit supports a variety of common voltage requirements of the liquid crystal display including an ability to select digital information of the digital information that is associated with the common voltage at the particular frame rate stored in the storage component and apply the common voltage at the particular frame rate to the liquid crystal display.

Abstract: An information handling display presents visual images in a privacy mode that manages visual image brightness with a local processing resource when a predetermined condition is detected, such as multiple individuals in the display field of view. For example, an information handling system provides visual information to a display timing controller that includes a pulse width modulation signal to command display backlight brightness. When in a privacy mode, the timing controller or another processing resource modifies the pulse width modulation signal to command a predetermined reduced brightness, such as in a range of 30 to 50 nits of reduced brightness.

Abstract: An information handling system may include an organic light-emitting diode (OLED) display layer of a video display to display an image to a user; an A-cover forming a housing behind the OLED display layer; and a physically bifurcated display daughter board between the OLED display layer and the A-cover, the physically bifurcated display daughter board including: a first portion of the display daughter board including a source driver integrated circuit (IC) operatively coupled to a processor to receive graphics data; and a second portion of the display daughter board comprising a power management integrated circuit (PMIC) operatively coupled to the first portion and a power source; the second portion of the display daughter board being mechanically coupled to an interior surface of the A-cover to dissipate heat away from the OLED display layer.

Abstract: An information handling system includes a timing controller configured to transmit a command for a common voltage of a particular frame rate to a power management circuit. A storage component may store digital information, wherein each digital information is associated with the common voltage of a particular frame rate. The power management circuit supports a variety of common voltage requirements of the liquid crystal display including an ability to select digital information of the digital information that is associated with the common voltage at the particular frame rate stored in the storage component and apply the common voltage at the particular frame rate to the liquid crystal display.

Abstract: A display device includes a light source arranged to emit light along a first edge of the display device, and aa light guide plate arranged go receive the emitted light at a minor surface of the light guide plate. The light guide plate includes prismatic elements configured to reemit the light out a first major surface of the light guide plate. A first region of the light guide plate has a first portion of the prismatic elements arranged in a first density to provide a first brightness of the reemitted light reemitted. A second region of the light guide plate has a second portion of the prismatic elements arranged in a second density to provide a second brightness of the reemitted light reemitted. The first region is provided substantially along a first edge of the first major surface, and the second region is provided along a second, a third, and a fourth edge of the first major surface. The first brightness is brighter than the second brightness.

Abstract: An information handling system may include an organic light-emitting diode (OLED) display layer of a video display to display an image to a user; an A-cover forming a housing behind the OLED display layer; and a physically bifurcated display daughter board between the OLED display layer and the A-cover, the physically bifurcated display daughter board including: a first portion of the display daughter board including a source driver integrated circuit (IC) operatively coupled to a processor to receive graphics data; and a second portion of the display daughter board comprising a power management integrated circuit (PMIC) operatively coupled to the first portion and a power source; the second portion of the display daughter board being mechanically coupled to an interior surface of the A-cover to dissipate heat away from the OLED display layer.