Abstract: A data acquisition (DAQ) system and method which includes an improved event architecture. The DAQ device includes event logic coupled to receive one or more external or internal events from event sources. The event logic comprises one or more event selectors and one or more event mappers. The event selectors and event mappers receive event signals from event sources and selectively route the event signals to one or more destinations, also referred to as destination hardware elements. The destinations are operable to perform an action in response to receipt of the selected event signal. The event architecture of the present invention is designed to take advantage of both the flexibility of the traditional computer interrupt architecture and the speed of direct hardware mapping. At its essence, the hardware architecture comprises a mini, hardware, interrupt service routine. Hardware events or triggers are mapped to a set of board-level Events which are similar to the traditional idea of an interrupt.

Abstract: A system and method for dynamically re-programming the acquisition cycle of a video acquisition system. The video acquisition system comprises a host computer and a video source. The host computer comprises a CPU, a system memory, and a video capture board. The video capture board receives a video signal from the video source. The video signal comprises a sequence of frames. The video capture board includes a DMA Controller which writes video frames to system memory under the control of a circularly linked list of commands. The linked list contains a plurality of sublists, each of which schedules the DMA transfer of a video frame to a corresponding video buffer in system memory. By removing a sublist from the linked list, a video buffer is removed from the set of buffers targeted for data transfer by the DMA Controller. By adding a sublist to the linked list, a video buffer is restored to the targeted set.