Patents by Inventor Dan Shier

Dan Shier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods to couple integrated circuit packages to bonding pads having vias
    Patent number: 7036712
    Abstract: The electrical contacts of an integrated circuit package are coupled to printed circuit board bonding pads that include vias having via channels. In one embodiment, a method for fabricating an electronic assembly utilizes a mask having at least one aperture that overlies the bonding pad without substantially overlying the bonding pad's via channel. The aperture can be of any shape, including a circle, ellipse, polygon, or a free-form shape. Solder paste is screened through the mask onto the printed circuit board pads but not the via channels. The electrical contacts of a surface mount technology component such as a ball grid array component can then be affixed to the bonding pads using a reflow soldering technique according to one embodiment.
    Type: Grant
    Filed: April 8, 2002
    Date of Patent: May 2, 2006
    Assignee: Intel Corporation
    Inventors: Stephen C. Joy, Dan Shier
  • Method and apparatus for coupling integrated circuit packages to bonding pads having vias
    Publication number: 20020108777
    Abstract: The electrical contacts of an integrated circuit package are coupled to printed circuit board bonding pads that include vias having via channels. In one embodiment, a method for fabricating an electronic assembly utilizes a mask having at least one aperture that overlies the bonding pad without substantially overlying the bonding pad's via channel. The aperture can be of any shape, including a circle, ellipse, polygon, or a free-form shape. Solder paste is screened through the mask onto the printed circuit board pads but not the via channels. The electrical contacts of a surface mount technology component such as a ball grid array component can then be affixed to the bonding pads using a reflow soldering technique according to one embodiment.
    Type: Application
    Filed: April 8, 2002
    Publication date: August 15, 2002
    Applicant: Intel Corporation
    Inventors: Stephen C. Joy, Dan Shier
  • Apparatus for coupling integrated circuit packages to bonding pads having vias
    Patent number: 6395995
    Abstract: The electrical contacts of an integrated circuit package are coupled to printed circuit board bonding pads that include vias having via channels. In one embodiment, a method for of any shape, including a circle, ellipse, polygon, or a free-form shape. Solder paste is screened through the mask onto the printed circuit board pads but not the via channels. The electrical contacts of a surface mount technology component such as a ball grid array component can then be affixed to the bonding pads using a reflow soldering technique according to one embodiment.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: May 28, 2002
    Assignee: Intel Corporation
    Inventors: Stephen C. Joy, Dan Shier