Patents by Inventor Dan Vangor

Dan Vangor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12379742
    Abstract: Embodiments of the present disclosure implement hardware-based snoop logic streaming timers for input/output (I/O) communications between a host and a shared network adapter in a computing system. The disclosed embodiments describe a hardware-based snoop logic and snoop logic timer function control of input/output (I/O) processor monitoring a defined memory area to detect a completion queue entry being written to a completion queue, and implementing streaming timers and interpacket timers, based on the completion queue entry and predefined configuration information for an associated host interface connection, to provide streaming data status, interpacket arrival times, and streaming timer expiration for the associated host interface connection.
    Type: Grant
    Filed: January 26, 2024
    Date of Patent: August 5, 2025
    Assignee: International Business Machines Corporation
    Inventors: Howard Michael Haynie, Michael James Becht, Dan Vangor, Bruce Ratcliff, Girish Gopala Kurup, Mushfiq Us Saleheen, Deepankar Bhattacharjee
  • Publication number: 20250168054
    Abstract: The embodiments herein describe communication between a host and a shared network adapter. Control queues can be activated first in order to issue control commands to configure the data plane in the shared network adapter. If an error occurs, the system can suspend the data queues while permitting the control queues to still transmit control plane data between the host and the shared network adapter.
    Type: Application
    Filed: November 17, 2023
    Publication date: May 22, 2025
    Inventors: Bruce RATCLIFF, Dan VANGOR, Stephen R. VALLEY, Margaret DUBOWSKY, Francis GASSERT, Jerry STEVENS, Richard P. TARCZA, Patricia G. DRIEVER
  • Publication number: 20250168123
    Abstract: Embodiments herein describe techniques for providing interrupts from a shared network adapter to a host operating system or control program. A register can store an interrupt state of the host that indicates whether an interrupt is required. For example, the host may still be busy processed previous received data (e.g., a packet received from a network), which means no interrupt is required. When the host has processed each of the requests from the shared network adapter, the interrupt state in the register can be changed that if any additional data is received, an interrupt is required. Moreover, the register can include a bitmask to indicate which of a plurality of receive data queues has data ready for the host to process.
    Type: Application
    Filed: November 17, 2023
    Publication date: May 22, 2025
    Inventors: Bruce RATCLIFF, Dan VANGOR, Stephen R. VALLEY, Margaret DUBOWSKY, Francis GASSERT, Jerry STEVENS, Richard P. TARCZA, Patricia G. DRIEVER
  • Publication number: 20250139009
    Abstract: Systems and techniques for snooping input/output (I/O) events in a computing system are described. An example technique includes obtaining a configuration comprising a plurality of snoop space profiles, each snoop space profile indicating a respective range of memory addresses that map to a respective completion queue. The technique also includes monitoring input/output (I/O) traffic exchanged across a communication interface between an I/O adapter and a processor in a computing system, based on the configuration. The technique further includes performing one or more actions to assist processing of the I/O traffic, based in part on the monitoring.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 1, 2025
    Inventors: Howard Michael HAYNIE, Michael James BECHT, Mushfiq Us SALEHEEN, Dan VANGOR, Girish Gopala KURUP, Luke HOPKINS, Bruce RATCLIFF
  • Publication number: 20250123871
    Abstract: Embodiments herein describe techniques for a host to provide TX packets to a shared adapter that then uses a NIC to forward the TX packet to a network. In one embodiment, the host creates or fills in one or more TX storage block page entries (SBPE) for the TX packet and stores an index of the TX SBPE in host memory. The host memory can also store an initiative state that tracks whether the shared adapter is currently processing TX packets. If not, the host can issue an interrupt to the shared adapter, along with the index associated with the TX SBPE. The shared adapter can then fetch the TX SBPE from host memory and program the NIC to transmit the TX packet.
    Type: Application
    Filed: October 16, 2023
    Publication date: April 17, 2025
    Inventors: Bruce RATCLIFF, Dan VANGOR, Stephen R. VALLEY, Margaret DUBOWSKY, Francis GASSERT, Jerry STEVENS, Richard P. TARCZA, Patricia G. DRIEVER
  • Publication number: 20250112968
    Abstract: Embodiments herein describe techniques for establishing data constructs for a data device that enable communication between a host and a shared adapter. A shared adapter facilitates communication with one or more hosts coupled to a NIC. To do so, a host can establish the data device in each operating system that wishes to communicate with the shared adapter. This can include establishing data constructs such as storage block pages, queue indexes, and interrupt registers in the host memory. The host can then transmit a queue description record (QDR) to the shared adapter so the adapter can configure the queues and has the addresses of the data constructs in the host memory.
    Type: Application
    Filed: September 29, 2023
    Publication date: April 3, 2025
    Inventors: Bruce RATCLIFF, Dan VANGOR, Stephen R. VALLEY, Margaret DUBOWSKY, Francis GASSERT, Jerry STEVENS, Richard P. TARCZA, Patricia G. DRIEVER
  • Patent number: 11979459
    Abstract: The embodiments herein describe configuring a data device that enables communication between a host and a shared network adapter. The data device can include data connections between the host and the shared network adapter. The data device can have both control queues in a control plane and data queues in a data plane. The control queues can be activated first in order to issue control commands to configure the data plane in the shared network adapter.
    Type: Grant
    Filed: October 12, 2023
    Date of Patent: May 7, 2024
    Assignee: International Business Machines Corporation
    Inventors: Bruce Ratcliff, Dan Vangor, Stephen R. Valley, Margaret Dubowsky, Francis Gassert, Jerry Stevens, Richard P. Tarcza, Patricia G. Driever
  • Patent number: 11194648
    Abstract: Aspects of the invention include receiving an error code describing a computer hardware or firmware error. A list of data items to be collected to assist in correcting the error is received. The contents of the list are selected based at least in part on the error code and are in priority order. The data items in the list are collected and a buffer to store the collected data items is selected. At least a subset of the collected data items to be written is transmitted to the buffer. All of the collected data items are transmitted to the buffer when the buffer is large enough to hold all of the data items in the list. A subset of the collected data items are transmitted to the buffer in priority order when the buffer is not large enough to hold all of the data in the list.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: December 7, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Richard Mark Sczepczenski, George Kuch, Daniel Hughes, Pascal Bastien, Luke Hopkins, Mahmoud Amin, Dan Vangor, Ying-Yeung Li, Myron Wisniewski, Margaret Frances Kaelin Dubowsky, Anmar A Al Zubaydi
  • Publication number: 20210173735
    Abstract: Aspects of the invention include receiving an error code describing a computer hardware or firmware error. A list of data items to be collected to assist in correcting the error is received. The contents of the list are selected based at least in part on the error code and are in priority order. The data items in the list are collected and a buffer to store the collected data items is selected. At least a subset of the collected data items to be written is transmitted to the buffer. All of the collected data items are transmitted to the buffer when the buffer is large enough to hold all of the data items in the list. A subset of the collected data items are transmitted to the buffer in priority order when the buffer is not large enough to hold all of the data in the list.
    Type: Application
    Filed: February 22, 2021
    Publication date: June 10, 2021
    Inventors: Richard Mark Sczepczenski, George Kuch, Daniel Hughes, Pascal Bastien, Luke Hopkins, Mahmoud Amin, Dan Vangor, Ying-Yeung Li, Myron Wisniewski, Margaret Frances Kaelin Dubowsky, Anmar A Al Zubaydi
  • Patent number: 11010230
    Abstract: Aspects of the invention include receiving an error code describing a computer hardware or firmware error. A list of data items to be collected to assist in correcting the error is built. The contents of the list are selected based at least in part on the error code and are in priority order. The data items in the list are collected and a buffer to store the collected data items is selected. At least a subset of the collected data items to be written is transmitted to the buffer. All of the collected data items are transmitted to the buffer when the buffer is large enough to hold all of the data items in the list. A subset of the collected data items are transmitted to the buffer in priority order when the buffer is not large enough to hold all of the data in the list.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: May 18, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Richard Mark Sczepczenski, George Kuch, Daniel Hughes, Pascal Bastien, Luke Hopkins, Mahmoud Amin, Dan Vangor, Ying-Yeung Li, Myron Wisniewski, Margaret Frances Kaelin Dubowsky, Anmar A Al Zubaydi
  • Publication number: 20210073067
    Abstract: Aspects of the invention include receiving an error code describing a computer hardware or firmware error. A list of data items to be collected to assist in correcting the error is built. The contents of the list are selected based at least in part on the error code and are in priority order. The data items in the list are collected and a buffer to store the collected data items is selected. At least a subset of the collected data items to be written is transmitted to the buffer. All of the collected data items are transmitted to the buffer when the buffer is large enough to hold all of the data items in the list. A subset of the collected data items are transmitted to the buffer in priority order when the buffer is not large enough to hold all of the data in the list.
    Type: Application
    Filed: September 10, 2019
    Publication date: March 11, 2021
    Inventors: Richard Mark Sczepczenski, George Kuch, Daniel Hughes, Pascal Bastien, Luke Hopkins, Mahmoud Amin, Dan Vangor, Ying-Yeung Li, Myron Wisniewski, Margaret Frances Kaelin Dubowsky, Anmar A Al Zubaydi